Add DDR EMI provider dictating dram interconnect bus performance
found on MT8183-based platforms

Signed-off-by: Henry Chen <henryc.c...@mediatek.com>
---
 arch/arm64/boot/dts/mediatek/mt8183.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi 
b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index d298013..ab98adb 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -10,6 +10,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/power/mt8183-power.h>
 #include <dt-bindings/soc/mtk,dvfsrc.h>
+#include <dt-bindings/interconnect/mtk,mt8183.h>
 
 / {
        compatible = "mediatek,mt8183";
@@ -139,6 +140,10 @@
                reg = <0 0x10012000 0 0x1000>;
                clocks = <&infracfg CLK_INFRA_DVFSRC>;
                clock-names = "dvfsrc";
+               ddr_emi: interconnect {
+                       compatible = "mediatek,mt8183-emi-icc";
+                       #interconnect-cells = <1>;
+               };
        };
 
        timer {
-- 
1.9.1

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