On Wed, Apr 10, 2019 at 03:49:54PM -0700, Atish Patra wrote:
[...]
>
> Ping?
>
Sorry for the delay(was off for a while), will take a look next week.
> Specifically, patch 3 & 4 affects ARM & ARM64. Any tests on real hardware
> would be great.
>
Sure.
--
Regards,
Sudeep
On 3/20/19 4:48 PM, Atish Patra wrote:
The cpu-map DT entry in ARM can describe the CPU topology in much better
way compared to other existing approaches. RISC-V can easily adopt this
binding to represent its own CPU topology. Thus, both cpu-map DT
binding and topology parsing code can be moved t
The cpu-map DT entry in ARM can describe the CPU topology in much better
way compared to other existing approaches. RISC-V can easily adopt this
binding to represent its own CPU topology. Thus, both cpu-map DT
binding and topology parsing code can be moved to a common location so
that RISC-V or any
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