On Fri, Jul 24, 2015 at 09:55:42AM +0100, Will Deacon wrote:
> On Thu, Jul 23, 2015 at 06:48:45PM +0100, Lorenzo Pieralisi wrote:
> > On Thu, Jul 23, 2015 at 05:12:57PM +0100, Bjorn Helgaas wrote:
> > > I'm a little uneasy that we might break some alpha or mips system, since
> > > there must have
On Thu, Jul 23, 2015 at 06:48:45PM +0100, Lorenzo Pieralisi wrote:
> On Thu, Jul 23, 2015 at 05:12:57PM +0100, Bjorn Helgaas wrote:
> > I'm a little uneasy that we might break some alpha or mips system, since
> > there must have been some reason this was done originally. It'd be ideal
> > if
On Thu, Jul 23, 2015 at 06:48:45PM +0100, Lorenzo Pieralisi wrote:
On Thu, Jul 23, 2015 at 05:12:57PM +0100, Bjorn Helgaas wrote:
I'm a little uneasy that we might break some alpha or mips system, since
there must have been some reason this was done originally. It'd be ideal
if somebody
On Fri, Jul 24, 2015 at 09:55:42AM +0100, Will Deacon wrote:
On Thu, Jul 23, 2015 at 06:48:45PM +0100, Lorenzo Pieralisi wrote:
On Thu, Jul 23, 2015 at 05:12:57PM +0100, Bjorn Helgaas wrote:
I'm a little uneasy that we might break some alpha or mips system, since
there must have been some
On 07/23/2015 10:52 AM, Lorenzo Pieralisi wrote:
For alpha, PCI_PROBE_ONLY is set for two platforms, marvel and titan,
out of ~20. mips sets the flag for 6 platforms out of >25.
Unlikely that those are the only relevant ones.
I could try to run some qemu tests for both architectures, but I
On Thu, Jul 23, 2015 at 05:47:44PM +0100, Guenter Roeck wrote:
> On 07/23/2015 09:12 AM, Bjorn Helgaas wrote:
> > On Thu, Jul 09, 2015 at 11:59:16AM +0100, Lorenzo Pieralisi wrote:
> >> When a PCI bus is scanned, upon PCI bridge detection the kernel
> >> has to read the bridge registers to set-up
On Thu, Jul 23, 2015 at 05:12:57PM +0100, Bjorn Helgaas wrote:
> On Thu, Jul 09, 2015 at 11:59:16AM +0100, Lorenzo Pieralisi wrote:
> > When a PCI bus is scanned, upon PCI bridge detection the kernel
> > has to read the bridge registers to set-up its resources so that
> > the PCI resource
On 07/23/2015 09:12 AM, Bjorn Helgaas wrote:
On Thu, Jul 09, 2015 at 11:59:16AM +0100, Lorenzo Pieralisi wrote:
When a PCI bus is scanned, upon PCI bridge detection the kernel
has to read the bridge registers to set-up its resources so that
the PCI resource hierarchy can be validated properly.
On Thu, Jul 09, 2015 at 11:59:16AM +0100, Lorenzo Pieralisi wrote:
> When a PCI bus is scanned, upon PCI bridge detection the kernel
> has to read the bridge registers to set-up its resources so that
> the PCI resource hierarchy can be validated properly.
>
> Most if not all architectures read
On 07/23/2015 10:52 AM, Lorenzo Pieralisi wrote:
For alpha, PCI_PROBE_ONLY is set for two platforms, marvel and titan,
out of ~20. mips sets the flag for 6 platforms out of 25.
Unlikely that those are the only relevant ones.
I could try to run some qemu tests for both architectures, but I have
On Thu, Jul 09, 2015 at 11:59:16AM +0100, Lorenzo Pieralisi wrote:
When a PCI bus is scanned, upon PCI bridge detection the kernel
has to read the bridge registers to set-up its resources so that
the PCI resource hierarchy can be validated properly.
Most if not all architectures read PCI
On Thu, Jul 23, 2015 at 05:47:44PM +0100, Guenter Roeck wrote:
On 07/23/2015 09:12 AM, Bjorn Helgaas wrote:
On Thu, Jul 09, 2015 at 11:59:16AM +0100, Lorenzo Pieralisi wrote:
When a PCI bus is scanned, upon PCI bridge detection the kernel
has to read the bridge registers to set-up its
On Thu, Jul 23, 2015 at 05:12:57PM +0100, Bjorn Helgaas wrote:
On Thu, Jul 09, 2015 at 11:59:16AM +0100, Lorenzo Pieralisi wrote:
When a PCI bus is scanned, upon PCI bridge detection the kernel
has to read the bridge registers to set-up its resources so that
the PCI resource hierarchy can
On 07/23/2015 09:12 AM, Bjorn Helgaas wrote:
On Thu, Jul 09, 2015 at 11:59:16AM +0100, Lorenzo Pieralisi wrote:
When a PCI bus is scanned, upon PCI bridge detection the kernel
has to read the bridge registers to set-up its resources so that
the PCI resource hierarchy can be validated properly.
Hi Guenter,
On Wed, Jul 22, 2015 at 03:22:57PM +0100, Guenter Roeck wrote:
> On 07/22/2015 02:14 AM, Lorenzo Pieralisi wrote:
> > Bjorn, Guenter,
> >
> > On Thu, Jul 09, 2015 at 11:59:16AM +0100, Lorenzo Pieralisi wrote:
> >> When a PCI bus is scanned, upon PCI bridge detection the kernel
> >>
On 07/22/2015 02:14 AM, Lorenzo Pieralisi wrote:
Bjorn, Guenter,
On Thu, Jul 09, 2015 at 11:59:16AM +0100, Lorenzo Pieralisi wrote:
When a PCI bus is scanned, upon PCI bridge detection the kernel
has to read the bridge registers to set-up its resources so that
the PCI resource hierarchy can be
Bjorn, Guenter,
On Thu, Jul 09, 2015 at 11:59:16AM +0100, Lorenzo Pieralisi wrote:
> When a PCI bus is scanned, upon PCI bridge detection the kernel
> has to read the bridge registers to set-up its resources so that
> the PCI resource hierarchy can be validated properly.
>
> Most if not all
Hi Guenter,
On Wed, Jul 22, 2015 at 03:22:57PM +0100, Guenter Roeck wrote:
On 07/22/2015 02:14 AM, Lorenzo Pieralisi wrote:
Bjorn, Guenter,
On Thu, Jul 09, 2015 at 11:59:16AM +0100, Lorenzo Pieralisi wrote:
When a PCI bus is scanned, upon PCI bridge detection the kernel
has to read the
Bjorn, Guenter,
On Thu, Jul 09, 2015 at 11:59:16AM +0100, Lorenzo Pieralisi wrote:
When a PCI bus is scanned, upon PCI bridge detection the kernel
has to read the bridge registers to set-up its resources so that
the PCI resource hierarchy can be validated properly.
Most if not all
On 07/22/2015 02:14 AM, Lorenzo Pieralisi wrote:
Bjorn, Guenter,
On Thu, Jul 09, 2015 at 11:59:16AM +0100, Lorenzo Pieralisi wrote:
When a PCI bus is scanned, upon PCI bridge detection the kernel
has to read the bridge registers to set-up its resources so that
the PCI resource hierarchy can be
When a PCI bus is scanned, upon PCI bridge detection the kernel
has to read the bridge registers to set-up its resources so that
the PCI resource hierarchy can be validated properly.
Most if not all architectures read PCI bridge registers in the
pcibios_fixup_bus hook, that is called by the PCI
When a PCI bus is scanned, upon PCI bridge detection the kernel
has to read the bridge registers to set-up its resources so that
the PCI resource hierarchy can be validated properly.
Most if not all architectures read PCI bridge registers in the
pcibios_fixup_bus hook, that is called by the PCI
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