On 11/12/2013 01:32 PM, Srivatsa S. Bhat wrote:
> On 09/26/2013 06:28 PM, Srivatsa S. Bhat wrote:
>> On 09/26/2013 05:10 AM, Andrew Morton wrote:
>>> On Thu, 26 Sep 2013 04:56:32 +0530 "Srivatsa S. Bhat"
>>> wrote:
>>>
Experimental Results:
Test setup:
>>>
On 11/12/2013 11:04 PM, Dave Hansen wrote:
> On 11/12/2013 12:02 AM, Srivatsa S. Bhat wrote:
>> I performed experiments on an IBM POWER 7 machine and got actual
>> power-savings
>> numbers (upto 2.6% of total system power) from this patchset. I presented
>> them
>> at the Kernel Summit but forgot
On 11/12/2013 12:02 AM, Srivatsa S. Bhat wrote:
> I performed experiments on an IBM POWER 7 machine and got actual power-savings
> numbers (upto 2.6% of total system power) from this patchset. I presented them
> at the Kernel Summit but forgot to post them on LKML. So here they are:
"upto"? What
On 09/26/2013 06:28 PM, Srivatsa S. Bhat wrote:
> On 09/26/2013 05:10 AM, Andrew Morton wrote:
>> On Thu, 26 Sep 2013 04:56:32 +0530 "Srivatsa S. Bhat"
>> wrote:
>>
>>> Experimental Results:
>>>
>>>
>>> Test setup:
>>> --
>>>
>>> x86 Sandybridge dual-socket quad core
On 09/26/2013 11:36 PM, Arjan van de Ven wrote:
>
Arjan, are you referring to the fact that Intel/SNB systems can exploit
memory self-refresh only when the entire system goes idle? Is that why
this
patchset won't turn out to be that useful on those platforms?
>>>
>>> no
Arjan, are you referring to the fact that Intel/SNB systems can exploit
memory self-refresh only when the entire system goes idle? Is that why
this
patchset won't turn out to be that useful on those platforms?
no we can use other things (CKE and co) all the time.
Ah, ok..
just that we fo
On 09/26/2013 09:28 PM, Arjan van de Ven wrote:
> On 9/26/2013 6:42 AM, Srivatsa S. Bhat wrote:
>> On 09/26/2013 08:29 AM, Andrew Morton wrote:
>>> On Thu, 26 Sep 2013 03:50:16 +0200 Andi Kleen
>>> wrote:
>>>
On Wed, Sep 25, 2013 at 06:21:29PM -0700, Andrew Morton wrote:
> On Wed, 25 Sep
On 9/26/2013 6:42 AM, Srivatsa S. Bhat wrote:
On 09/26/2013 08:29 AM, Andrew Morton wrote:
On Thu, 26 Sep 2013 03:50:16 +0200 Andi Kleen wrote:
On Wed, Sep 25, 2013 at 06:21:29PM -0700, Andrew Morton wrote:
On Wed, 25 Sep 2013 18:15:21 -0700 Arjan van de Ven
wrote:
On 9/25/2013 4:47 PM,
On 9/26/2013 5:58 AM, Srivatsa S. Bhat wrote:
Let me explain the challenge I am facing. A prototype powerpc platform that
I work with has the capability to transition memory banks to content-preserving
low-power states at a per-socket granularity. What that means is that we can
get memory power s
On 9/25/2013 6:21 PM, Andrew Morton wrote:
On Wed, 25 Sep 2013 18:15:21 -0700 Arjan van de Ven
wrote:
On 9/25/2013 4:47 PM, Andi Kleen wrote:
Also, the changelogs don't appear to discuss one obvious downside: the
latency incurred in bringing a bank out of one of the low-power states
and back
On 09/26/2013 08:29 AM, Andrew Morton wrote:
> On Thu, 26 Sep 2013 03:50:16 +0200 Andi Kleen wrote:
>
>> On Wed, Sep 25, 2013 at 06:21:29PM -0700, Andrew Morton wrote:
>>> On Wed, 25 Sep 2013 18:15:21 -0700 Arjan van de Ven
>>> wrote:
>>>
On 9/25/2013 4:47 PM, Andi Kleen wrote:
>> Also
On 09/26/2013 07:20 AM, Andi Kleen wrote:
> On Wed, Sep 25, 2013 at 06:21:29PM -0700, Andrew Morton wrote:
>> On Wed, 25 Sep 2013 18:15:21 -0700 Arjan van de Ven
>> wrote:
>>
>>> On 9/25/2013 4:47 PM, Andi Kleen wrote:
> Also, the changelogs don't appear to discuss one obvious downside: the
>
On 09/26/2013 06:45 AM, Arjan van de Ven wrote:
> On 9/25/2013 4:47 PM, Andi Kleen wrote:
>>> Also, the changelogs don't appear to discuss one obvious downside: the
>>> latency incurred in bringing a bank out of one of the low-power states
>>> and back into full operation. Please do discuss and qu
On 09/26/2013 06:44 AM, Arjan van de Ven wrote:
> On 9/25/2013 4:47 PM, Andi Kleen wrote:
>>> Also, the changelogs don't appear to discuss one obvious downside: the
>>> latency incurred in bringing a bank out of one of the low-power states
>>> and back into full operation. Please do discuss and qu
On 09/26/2013 05:10 AM, Andrew Morton wrote:
> On Thu, 26 Sep 2013 04:56:32 +0530 "Srivatsa S. Bhat"
> wrote:
>
>> Experimental Results:
>>
>>
>> Test setup:
>> --
>>
>> x86 Sandybridge dual-socket quad core HT-enabled machine, with 128GB RAM.
>> Memory Region size =
On Thu, 26 Sep 2013 03:50:16 +0200 Andi Kleen wrote:
> On Wed, Sep 25, 2013 at 06:21:29PM -0700, Andrew Morton wrote:
> > On Wed, 25 Sep 2013 18:15:21 -0700 Arjan van de Ven
> > wrote:
> >
> > > On 9/25/2013 4:47 PM, Andi Kleen wrote:
> > > >> Also, the changelogs don't appear to discuss one o
On Wed, Sep 25, 2013 at 06:21:29PM -0700, Andrew Morton wrote:
> On Wed, 25 Sep 2013 18:15:21 -0700 Arjan van de Ven
> wrote:
>
> > On 9/25/2013 4:47 PM, Andi Kleen wrote:
> > >> Also, the changelogs don't appear to discuss one obvious downside: the
> > >> latency incurred in bringing a bank out
On Wed, 25 Sep 2013 18:15:21 -0700 Arjan van de Ven
wrote:
> On 9/25/2013 4:47 PM, Andi Kleen wrote:
> >> Also, the changelogs don't appear to discuss one obvious downside: the
> >> latency incurred in bringing a bank out of one of the low-power states
> >> and back into full operation. Please
On 9/25/2013 4:47 PM, Andi Kleen wrote:
Also, the changelogs don't appear to discuss one obvious downside: the
latency incurred in bringing a bank out of one of the low-power states
and back into full operation. Please do discuss and quantify that to
the best of your knowledge.
On Sandy Bridge
On 9/25/2013 4:47 PM, Andi Kleen wrote:
Also, the changelogs don't appear to discuss one obvious downside: the
latency incurred in bringing a bank out of one of the low-power states
and back into full operation. Please do discuss and quantify that to
the best of your knowledge.
On Sandy Bridge
> Also, the changelogs don't appear to discuss one obvious downside: the
> latency incurred in bringing a bank out of one of the low-power states
> and back into full operation. Please do discuss and quantify that to
> the best of your knowledge.
On Sandy Bridge the memry wakeup overhead is reall
On Thu, 26 Sep 2013 04:56:32 +0530 "Srivatsa S. Bhat"
wrote:
> Experimental Results:
>
>
> Test setup:
> --
>
> x86 Sandybridge dual-socket quad core HT-enabled machine, with 128GB RAM.
> Memory Region size = 512MB.
Yes, but how much power was saved ;)
Also, the
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