e.de'; 'lgirdw...@gmail.com'; 'linux-
> ker...@vger.kernel.org'
> Subject: Re: [alsa-devel] [PATCH] ASoC: Add support for multi register mux
>
> * PGP Signed by an unknown key
>
> On Mon, Mar 31, 2014 at 01:55:52PM +0200, Lars-Peter Clausen wrote:
> &g
On Mon, Mar 31, 2014 at 01:55:52PM +0200, Lars-Peter Clausen wrote:
> On 03/31/2014 01:21 PM, Mark Brown wrote:
> >The above is a bit confusing... partly this is because of a lack of
> >context (what is MULTI_MUX_INPUT_OFFSET?) and partly because it isn't
> >entirely obvious that stopping as soon
On 03/31/2014 01:21 PM, Mark Brown wrote:
On Sat, Mar 29, 2014 at 11:12:30PM -0700, Arun Shamanna Lakshmi wrote:
Fix your mailer to word wrap within paragraphs, your mails are
excessively hard to read.
I'm not sure I understand how that MUX_OFFSET would work. To get the
selected mux output you
On Sat, Mar 29, 2014 at 11:12:30PM -0700, Arun Shamanna Lakshmi wrote:
Fix your mailer to word wrap within paragraphs, your mails are
excessively hard to read.
> > I'm not sure I understand how that MUX_OFFSET would work. To get the
> > selected mux output you can use the ffs instruction.
> > fo
;; 'alsa-de...@alsa-project.org'; 'ti...@suse.de';
> 'linux-kernel@vger.kernel.org'
> Subject: Re: [alsa-devel] [PATCH] ASoC: Add support for multi register mux
>
> On 03/29/2014 03:30 AM, Songhee Baek wrote:
> >> -Original Message-
> >&g
;alsa-de...@alsa-project.org'; 'ti...@suse.de';
'linux-kernel@vger.kernel.org'
Subject: RE: [alsa-devel] [PATCH] ASoC: Add support for multi register mux
On 03/26/2014 11:41 PM, Songhee Baek wrote:
On 03/26/2014 01:02 AM, Arun Shamanna Lakshmi wrote:
The way you desc
-project.org'; 'ti...@suse.de';
> 'linux-kernel@vger.kernel.org'
> Subject: RE: [alsa-devel] [PATCH] ASoC: Add support for multi register mux
>
>
> > > On 03/26/2014 11:41 PM, Songhee Baek wrote:
> > > >> On 03/26/2014 01:02 AM, Arun Sha
> > On 03/26/2014 11:41 PM, Songhee Baek wrote:
> > >> On 03/26/2014 01:02 AM, Arun Shamanna Lakshmi wrote:
> > >>
> > >> The way you describe this it seems to me that a value array for
> > >> this kind of mux would look like.
> > >>
> > >> 0x, 0x, 0x0001
> > >> 0x, 0x0
de;
> linux-kernel@vger.kernel.org
> Subject: Re: [alsa-devel] [PATCH] ASoC: Add support for multi register mux
>
> On 03/26/2014 11:41 PM, Songhee Baek wrote:
> >> -Original Message-
> >> From: Lars-Peter Clausen [mailto:l...@metafoo.de]
> >> Sent:
-project.org; ti...@suse.de; linux-
ker...@vger.kernel.org
Subject: Re: [alsa-devel] [PATCH] ASoC: Add support for multi register mux
On 03/26/2014 01:02 AM, Arun Shamanna Lakshmi wrote:
If the mux uses 1 bit position per input, and requires to set one
single bit at a time, then an N bit register can support
roject.org;
> swar...@wwwdotorg.org; ti...@suse.de; lgirdw...@gmail.com; linux-
> ker...@vger.kernel.org
> Subject: Re: [alsa-devel] [PATCH] ASoC: Add support for multi register mux
>
> * PGP Signed by an unknown key
>
> On Wed, Mar 26, 2014 at 08:38:47PM +0100, Lars-Peter Clausen
On Wed, Mar 26, 2014 at 08:38:47PM +0100, Lars-Peter Clausen wrote:
> On 03/26/2014 01:02 AM, Arun Shamanna Lakshmi wrote:
> The way you describe this it seems to me that a value array for this kind of
> mux would look like.
> 0x, 0x, 0x0001
> 0x, 0x, 0x000
e.de; linux-
> ker...@vger.kernel.org
> Subject: Re: [alsa-devel] [PATCH] ASoC: Add support for multi register mux
>
> On 03/26/2014 01:02 AM, Arun Shamanna Lakshmi wrote:
> > If the mux uses 1 bit position per input, and requires to set one
> > single bit at a time, then an N b
On 03/26/2014 01:02 AM, Arun Shamanna Lakshmi wrote:
If the mux uses 1 bit position per input, and requires to set one
single bit at a time, then an N bit register can support up to N
inputs. In more recent Tegra chips, we have at least greater than
64 inputs which requires at least 2 .reg fields
On Thu, Mar 20, 2014 at 08:40:54PM +0100, Lars-Peter Clausen wrote:
> On 03/20/2014 08:05 PM, Lars-Peter Clausen wrote:
> >It might make sense to add special code for supported muxes with a one-hot
> >encoding instead of using a value mux. Having an large array where each
> >entry is just 1< >need
On 03/20/2014 08:05 PM, Lars-Peter Clausen wrote:
On 03/20/2014 07:36 PM, Mark Brown wrote:
On Thu, Mar 20, 2014 at 12:20:17PM -0600, Stephen Warren wrote:
On 03/20/2014 05:48 AM, Mark Brown wrote:
On Wed, Mar 19, 2014 at 04:44:00PM -0700, Arun Shamanna Lakshmi wrote:
If each bit of a 32 bi
On 03/20/2014 07:36 PM, Mark Brown wrote:
On Thu, Mar 20, 2014 at 12:20:17PM -0600, Stephen Warren wrote:
On 03/20/2014 05:48 AM, Mark Brown wrote:
On Wed, Mar 19, 2014 at 04:44:00PM -0700, Arun Shamanna Lakshmi wrote:
If each bit of a 32 bit register maps to an input of a mux, then with
the
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