Re: [patch 1/2] clk: spear3xx: Use proper control register offset

On Fri, Jun 20, 2014 at 3:22 AM, Thomas Gleixner wrote: > The control register is at offset 0x10, not 0x0. This is wreckaged > since commit 5df33a62c (SPEAr: Switch to common clock framework). > > Signed-off-by: Thomas Gleixner > Cc: sta...@vger.kernel.org > --- > drivers/clk/spear/spear3xx_cloc

[patch 1/2] clk: spear3xx: Use proper control register offset

The control register is at offset 0x10, not 0x0. This is wreckaged since commit 5df33a62c (SPEAr: Switch to common clock framework). Signed-off-by: Thomas Gleixner Cc: sta...@vger.kernel.org --- drivers/clk/spear/spear3xx_clock.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) Index: l