Re: [patch 4/4] powerpc 2.6.21-rt1: reduce scheduling latency by changing tlb flush size

2007-05-15 Thread Benjamin Herrenschmidt
> >Have you > > measured > > the time it takes ? We might want to modulate the amount based on wether we > > are using native hash tables or an hypervisor. > > Yes, here is the trace log. Accordint it, flushing 9 entries takes a

Re: [patch 4/4] powerpc 2.6.21-rt1: reduce scheduling latency by changing tlb flush size

2007-05-15 Thread Tsutomu OWA
At Tue, 15 May 2007 17:38:27 +1000, Benjamin Herrenschmidt wrote: > > +#ifdef CONFIG_PREEMPT_RT > > + /* > > +* Since flushing tlb needs expensive hypervisor call(s) on celleb, > > +* always flush it on RT to reduce scheduling latency. > > +*/ > > + if (machine_is(celleb)) { > > +

Re: [patch 4/4] powerpc 2.6.21-rt1: reduce scheduling latency by changing tlb flush size

2007-05-15 Thread Benjamin Herrenschmidt
> + > +#ifdef CONFIG_PREEMPT_RT > + /* > + * Since flushing tlb needs expensive hypervisor call(s) on celleb, > + * always flush it on RT to reduce scheduling latency. > + */ > + if (machine_is(celleb)) { > + flush_tlb_pending(); > + return; > + }

Re: [patch 4/4] powerpc 2.6.21-rt1: reduce scheduling latency by changing tlb flush size

2007-05-15 Thread Benjamin Herrenschmidt
On Tue, 2007-05-15 at 13:12 +0900, Tsutomu OWA wrote: > > With this code, you get silent side-effects of enabling PPC_CELLEB > > along with another platform. > > Yeah, thank you for pointing it out. > I'll send revised patch later. > > > Maybe instead you should change the hpte_need_flush()

Re: [patch 4/4] powerpc 2.6.21-rt1: reduce scheduling latency by changing tlb flush size

2007-05-15 Thread Benjamin Herrenschmidt
On Mon, 2007-05-14 at 16:40 +0200, Arnd Bergmann wrote: > On Monday 14 May 2007, Tsutomu OWA wrote: > > --- linux-2.6.21-rt1/include/asm-powerpc/tlbflush.h 2007-04-26 > > 12:08:32.0 +0900 > > +++ rt/include/asm-powerpc/tlbflush.h 2007-05-14 16:12:47.0 +0900 > > @@ -25,7 +25,1

Re: [patch 4/4] powerpc 2.6.21-rt1: reduce scheduling latency by changing tlb flush size

2007-05-14 Thread Tsutomu OWA
At Mon, 14 May 2007 16:40:02 +0200, Arnd Bergmann wrote: > > +#if defined(CONFIG_PPC_CELLEB) && defined(CONFIG_PREEMPT_RT) > > +/* Since tlb flush takes long time on Celleb, reduce it to 1 when Celleb > > && RT */ > > +#define PPC64_TLB_BATCH_NR 1 > With this code, you get silent side-effects o

Re: [patch 4/4] powerpc 2.6.21-rt1: reduce scheduling latency by changing tlb flush size

2007-05-14 Thread Tsutomu OWA
At Mon, 14 May 2007 16:40:02 +0200, Arnd Bergmann wrote: > > On Monday 14 May 2007, Tsutomu OWA wrote: > > --- linux-2.6.21-rt1/include/asm-powerpc/tlbflush.h 2007-04-26 > > 12:08:32.0 +0900 > > +++ rt/include/asm-powerpc/tlbflush.h   2007-05-14 16:12:47.0 +0900 > > @@ -25,7

Re: [patch 4/4] powerpc 2.6.21-rt1: reduce scheduling latency by changing tlb flush size

2007-05-14 Thread Arnd Bergmann
On Monday 14 May 2007, Tsutomu OWA wrote: > --- linux-2.6.21-rt1/include/asm-powerpc/tlbflush.h 2007-04-26 > 12:08:32.0 +0900 > +++ rt/include/asm-powerpc/tlbflush.h   2007-05-14 16:12:47.0 +0900 > @@ -25,7 +25,12 @@ struct mm_struct; >  #include >  #include >   > +#if define

Re: [patch 4/4] powerpc 2.6.21-rt1: reduce scheduling latency by changing tlb flush size

2007-05-14 Thread Tsutomu OWA
At Mon, 14 May 2007 08:51:46 +0200, Thomas Gleixner wrote: > On Mon, 2007-05-14 at 15:38 +0900, Tsutomu OWA wrote: > > As I don't know how long it takes on other platforms, it would be better to > > enclose it within #ifdef CONFIG_PPC_CELLEB. > > Yes, that might be appropriate. Can you add this

Re: [patch 4/4] powerpc 2.6.21-rt1: reduce scheduling latency by changing tlb flush size

2007-05-13 Thread Thomas Gleixner
Tsutomu-san, On Mon, 2007-05-14 at 15:38 +0900, Tsutomu OWA wrote: > Oopps, Subject was wrong resending it. Sorry. > > To reduce scheduling latecy by changing tlb flush size to 1. > Since tlb flush on Celleb is done by calling (an) expensive hypervisor > call(s), > it takes a long time to

Re: [patch 4/4] powerpc 2.6.21-rt1: reduce scheduling latency by changing tlb flush size

2007-05-13 Thread Tsutomu OWA
Oopps, Subject was wrong resending it. Sorry. To reduce scheduling latecy by changing tlb flush size to 1. Since tlb flush on Celleb is done by calling (an) expensive hypervisor call(s), it takes a long time to flush tlbs and causes scheduing latency. As I don't know how long it takes on o