On Wed, 29 May 2013, Grant Likely wrote:
> > --- linux-2.6.orig/include/linux/irq.h
> > +++ linux-2.6/include/linux/irq.h
> > @@ -678,6 +678,8 @@ struct irq_chip_type {
> > * @wake_active: Interrupt is marked as an wakeup from suspend source
> > * @num_ct:Number of available i
On Mon, 06 May 2013 14:30:27 -, Thomas Gleixner wrote:
> Provide infrastructure for irq chip implementations which work on
> linear irq domains.
>
> - Interface to allocate multiple generic chips which are associated to
> the irq domain.
>
> - Interface to get the generic chip pointer for
Provide infrastructure for irq chip implementations which work on
linear irq domains.
- Interface to allocate multiple generic chips which are associated to
the irq domain.
- Interface to get the generic chip pointer for a particular hardware
interrupt in the domain.
- irq domain mapping fun
On Sat, 4 May 2013, Sebastian Hesselbarth wrote:
> On 05/03/2013 11:50 PM, Thomas Gleixner wrote:
> > Provide infrastructure for irq chip implementations which work on
> > linear irq domains.
>
> Thomas,
>
> I am happy that I put you into rant mode. It took me little more
> than an hour to read
On 05/03/2013 11:50 PM, Thomas Gleixner wrote:
> Provide infrastructure for irq chip implementations which work on
> linear irq domains.
Thomas,
I am happy that I put you into rant mode. It took me little more
than an hour to read through your patches, prepare orion irqchip
driver on top of them
On Fri, 3 May 2013, Russell King - ARM Linux wrote:
> On Fri, May 03, 2013 at 09:50:53PM -, Thomas Gleixner wrote:
> > + /* Init mask cache ? */
> > + if (dgc->gc_flags & IRQ_GC_INIT_MASK_CACHE) {
> > + raw_spin_lock_irqsave(&gc->lock, flags);
> > + gc->mask_cache = irq
On Fri, May 03, 2013 at 09:50:53PM -, Thomas Gleixner wrote:
> + /* Init mask cache ? */
> + if (dgc->gc_flags & IRQ_GC_INIT_MASK_CACHE) {
> + raw_spin_lock_irqsave(&gc->lock, flags);
> + gc->mask_cache = irq_reg_readl(gc->reg_base + ct->regs.mask);
> +
Provide infrastructure for irq chip implementations which work on
linear irq domains.
- Interface to allocate multiple generic chips which are associated to
the irq domain.
- Interface to get the generic chip pointer for a particular hardware
interrupt in the domain.
- irq domain mapping fun
8 matches
Mail list logo
