The following commit has been merged into the x86/seves branch of tip: Commit-ID: 3ad84246a4097010f3ae3d6944120c0be00e9e7a Gitweb: https://git.kernel.org/tip/3ad84246a4097010f3ae3d6944120c0be00e9e7a Author: Joerg Roedel <jroe...@suse.de> AuthorDate: Wed, 28 Oct 2020 17:46:55 +01:00 Committer: Borislav Petkov <b...@suse.de> CommitterDate: Thu, 29 Oct 2020 10:54:36 +01:00
x86/boot/compressed/64: Introduce sev_status Introduce sev_status and initialize it together with sme_me_mask to have an indicator which SEV features are enabled. Signed-off-by: Joerg Roedel <jroe...@suse.de> Signed-off-by: Borislav Petkov <b...@suse.de> Reviewed-by: Tom Lendacky <thomas.lenda...@amd.com> Link: https://lkml.kernel.org/r/20201028164659.27002-2-j...@8bytes.org --- arch/x86/boot/compressed/mem_encrypt.S | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/arch/x86/boot/compressed/mem_encrypt.S b/arch/x86/boot/compressed/mem_encrypt.S index dd07e7b..3092ae1 100644 --- a/arch/x86/boot/compressed/mem_encrypt.S +++ b/arch/x86/boot/compressed/mem_encrypt.S @@ -81,6 +81,19 @@ SYM_FUNC_START(set_sev_encryption_mask) bts %rax, sme_me_mask(%rip) /* Create the encryption mask */ + /* + * Read MSR_AMD64_SEV again and store it to sev_status. Can't do this in + * get_sev_encryption_bit() because this function is 32-bit code and + * shared between 64-bit and 32-bit boot path. + */ + movl $MSR_AMD64_SEV, %ecx /* Read the SEV MSR */ + rdmsr + + /* Store MSR value in sev_status */ + shlq $32, %rdx + orq %rdx, %rax + movq %rax, sev_status(%rip) + .Lno_sev_mask: movq %rbp, %rsp /* Restore original stack pointer */ @@ -96,5 +109,6 @@ SYM_FUNC_END(set_sev_encryption_mask) #ifdef CONFIG_AMD_MEM_ENCRYPT .balign 8 -SYM_DATA(sme_me_mask, .quad 0) +SYM_DATA(sme_me_mask, .quad 0) +SYM_DATA(sev_status, .quad 0) #endif
