Commit-ID: b6a32f023fcc9cbd1602f78a467fd8d41bbc9457
Gitweb: http://git.kernel.org/tip/b6a32f023fcc9cbd1602f78a467fd8d41bbc9457
Author: Jiri Olsa <jo...@kernel.org>
AuthorDate: Thu, 18 Aug 2016 11:09:52 +0200
Committer: Ingo Molnar <mi...@kernel.org>
CommitDate: Thu, 18 Aug 2016 11:58:02 +0200
perf/x86: Fix PEBS threshold initialization
Latest PEBS rework change could skip initialization
of the ds->pebs_interrupt_threshold for single event
PEBS threshold events.
Make sure the PEBS threshold gets always initialized.
Signed-off-by: Jiri Olsa <jo...@redhat.com>
Cc: Alexander Shishkin <alexander.shish...@linux.intel.com>
Cc: Arnaldo Carvalho de Melo <a...@kernel.org>
Cc: Linus Torvalds <torva...@linux-foundation.org>
Cc: Peter Zijlstra <a.p.zijls...@chello.nl>
Cc: Peter Zijlstra <pet...@infradead.org>
Cc: Thomas Gleixner <t...@linutronix.de>
Fixes: 09e61b4f7849 ("perf/x86/intel: Rework the large PEBS setup code")
Link:
http://lkml.kernel.org/r/1471511392-29875-1-git-send-email-jo...@kernel.org
Signed-off-by: Ingo Molnar <mi...@kernel.org>
---
arch/x86/events/intel/ds.c | 12 +++++++++++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c
index 248023f..e0288d5 100644
--- a/arch/x86/events/intel/ds.c
+++ b/arch/x86/events/intel/ds.c
@@ -834,14 +834,24 @@ static inline void pebs_update_threshold(struct
cpu_hw_events *cpuc)
static void
pebs_update_state(bool needed_cb, struct cpu_hw_events *cpuc, struct pmu *pmu)
{
+ /*
+ * Make sure we get updated with the first PEBS
+ * event. It will trigger also during removal, but
+ * that does not hurt:
+ */
+ bool update = cpuc->n_pebs == 1;
+
if (needed_cb != pebs_needs_sched_cb(cpuc)) {
if (!needed_cb)
perf_sched_cb_inc(pmu);
else
perf_sched_cb_dec(pmu);
- pebs_update_threshold(cpuc);
+ update = true;
}
+
+ if (update)
+ pebs_update_threshold(cpuc);
}
void intel_pmu_pebs_add(struct perf_event *event)
