Commit-ID: 2fd9c41aea47f4ad071accf94b94f94f2c4d31eb Gitweb: https://git.kernel.org/tip/2fd9c41aea47f4ad071accf94b94f94f2c4d31eb Author: Nick Desaulniers <ndesaulni...@google.com> AuthorDate: Wed, 3 Jan 2018 12:39:52 -0800 Committer: Thomas Gleixner <t...@linutronix.de> CommitDate: Wed, 3 Jan 2018 23:19:33 +0100
x86/process: Define cpu_tss_rw in same section as declaration cpu_tss_rw is declared with DECLARE_PER_CPU_PAGE_ALIGNED but then defined with DEFINE_PER_CPU_SHARED_ALIGNED leading to section mismatch warnings. Use DEFINE_PER_CPU_PAGE_ALIGNED consistently. This is necessary because it's mapped to the cpu entry area and must be page aligned. [ tglx: Massaged changelog a bit ] Fixes: 1a935bc3d4ea ("x86/entry: Move SYSENTER_stack to the beginning of struct tss_struct") Suggested-by: Thomas Gleixner <t...@linutronix.de> Signed-off-by: Nick Desaulniers <ndesaulni...@google.com> Signed-off-by: Thomas Gleixner <t...@linutronix.de> Cc: thomas.lenda...@amd.com Cc: Borislav Petkov <bpet...@suse.de> Cc: tklau...@distanz.ch Cc: mini...@googlemail.com Cc: m...@kylehuey.com Cc: na...@vmware.com Cc: l...@kernel.org Cc: jpoim...@redhat.com Cc: t...@kernel.org Cc: c...@linux.com Cc: b...@suse.de Cc: thgar...@google.com Cc: kirill.shute...@linux.intel.com Cc: sta...@vger.kernel.org Link: https://lkml.kernel.org/r/20180103203954.183360-1-ndesaulni...@google.com --- arch/x86/kernel/process.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c index 5174159..3cb2486 100644 --- a/arch/x86/kernel/process.c +++ b/arch/x86/kernel/process.c @@ -47,7 +47,7 @@ * section. Since TSS's are completely CPU-local, we want them * on exact cacheline boundaries, to eliminate cacheline ping-pong. */ -__visible DEFINE_PER_CPU_SHARED_ALIGNED(struct tss_struct, cpu_tss_rw) = { +__visible DEFINE_PER_CPU_PAGE_ALIGNED(struct tss_struct, cpu_tss_rw) = { .x86_tss = { /* * .sp0 is only used when entering ring 0 from a lower