Commit-ID: 4635fdc696a8e89eead3ea1712ae6ada38538d40 Gitweb: http://git.kernel.org/tip/4635fdc696a8e89eead3ea1712ae6ada38538d40 Author: Bin Gao <bin....@linux.intel.com> AuthorDate: Tue, 15 Nov 2016 12:27:23 -0800 Committer: Thomas Gleixner <t...@linutronix.de> CommitDate: Fri, 18 Nov 2016 10:58:30 +0100
x86/tsc: Mark Intel ATOM_GOLDMONT TSC reliable On Intel GOLDMONT Atom SoC TSC is the only available clocksource, so there is no way to do software calibration or have a watchdog clocksource for it. Software calibration is already disabled via the TSC_KNOWN_FREQ flag, but the watchdog requirement still persists, so such systems cannot switch to high resolution/nohz mode. Mark it reliable, so it becomes usable. Hardware teams confirmed that this is safe on that SoC. Signed-off-by: Bin Gao <bin....@intel.com> Cc: Peter Zijlstra <pet...@infradead.org> Link: http://lkml.kernel.org/r/1479241644-234277-4-git-send-email-bin....@linux.intel.com Signed-off-by: Thomas Gleixner <t...@linutronix.de> --- arch/x86/kernel/tsc.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index e58c319..f4dfdaa 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -709,6 +709,13 @@ unsigned long native_calibrate_tsc(void) */ setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); + /* + * For Atom SoCs TSC is the only reliable clocksource. + * Mark TSC reliable so no watchdog on it. + */ + if (boot_cpu_data.x86_model == INTEL_FAM6_ATOM_GOLDMONT) + setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE); + return crystal_khz * ebx_numerator / eax_denominator; }
