On Tue, 2017-01-03 at 08:41 -0800, Dave Hansen wrote:
> On 12/27/2016 02:33 PM, Ricardo Neri wrote:
> >>> diff --git a/arch/x86/mm/mpx.c b/arch/x86/mm/mpx.c
> >>> index 6a75a75..71681d0 100644
> >>> --- a/arch/x86/mm/mpx.c
> >>> +++ b/arch/x86/mm/mpx.c
> >>> @@ -120,6 +120,13 @@ static int get_reg_
On 12/27/2016 02:33 PM, Ricardo Neri wrote:
>>> diff --git a/arch/x86/mm/mpx.c b/arch/x86/mm/mpx.c
>>> index 6a75a75..71681d0 100644
>>> --- a/arch/x86/mm/mpx.c
>>> +++ b/arch/x86/mm/mpx.c
>>> @@ -120,6 +120,13 @@ static int get_reg_offset(struct insn *insn, struct
>>> pt_regs *regs,
>>>
>>>
On Fri, 2016-12-23 at 17:58 -0800, Andy Lutomirski wrote:
> On Fri, Dec 23, 2016 at 5:37 PM, Ricardo Neri
> wrote:
> > Section 2.2.1.2 of the Intel 64 and IA-32 Architectures Software
> > Developer's Manual volume 2A states that when memory addressing with no
> > explicit displacement (i.e, mod pa
On Fri, Dec 23, 2016 at 5:37 PM, Ricardo Neri
wrote:
> Section 2.2.1.2 of the Intel 64 and IA-32 Architectures Software
> Developer's Manual volume 2A states that when memory addressing with no
> explicit displacement (i.e, mod part of ModR/M is 0), a SIB byte is used
> and the base of the SIB byt
Section 2.2.1.2 of the Intel 64 and IA-32 Architectures Software
Developer's Manual volume 2A states that when memory addressing with no
explicit displacement (i.e, mod part of ModR/M is 0), a SIB byte is used
and the base of the SIB byte points to (R/EBP) (i.e., base = 5), an
explicit displacement
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