On Fri, 2016-12-30 at 18:07 -0800, Andy Lutomirski wrote:
> On Thu, Dec 29, 2016 at 9:23 PM, Ricardo Neri
> wrote:
> > On Tue, 2016-12-27 at 16:48 -0800, Andy Lutomirski wrote:
> >>
> >> >> > + if (nr_copied > 0)
> >> >> > +
On Fri, 2016-12-30 at 18:07 -0800, Andy Lutomirski wrote:
> On Thu, Dec 29, 2016 at 9:23 PM, Ricardo Neri
> wrote:
> > On Tue, 2016-12-27 at 16:48 -0800, Andy Lutomirski wrote:
> >>
> >> >> > + if (nr_copied > 0)
> >> >> > + return -EFAULT;
> >> >>
> >> >>
On Thu, Dec 29, 2016 at 9:23 PM, Ricardo Neri
wrote:
> On Tue, 2016-12-27 at 16:48 -0800, Andy Lutomirski wrote:
>>
>> >> > + if (nr_copied > 0)
>> >> > + return -EFAULT;
>> >>
>> >> This should be the only EFAULT case.
On Thu, Dec 29, 2016 at 9:23 PM, Ricardo Neri
wrote:
> On Tue, 2016-12-27 at 16:48 -0800, Andy Lutomirski wrote:
>>
>> >> > + if (nr_copied > 0)
>> >> > + return -EFAULT;
>> >>
>> >> This should be the only EFAULT case.
>> > Should this be EFAULT event if the
On Tue, 2016-12-27 at 16:48 -0800, Andy Lutomirski wrote:
> On Tue, Dec 27, 2016 at 4:39 PM, Ricardo Neri
> wrote:
> > On Fri, 2016-12-23 at 18:11 -0800, Andy Lutomirski wrote:
> >> On Fri, Dec 23, 2016 at 5:37 PM, Ricardo Neri
> >>
On Tue, 2016-12-27 at 16:48 -0800, Andy Lutomirski wrote:
> On Tue, Dec 27, 2016 at 4:39 PM, Ricardo Neri
> wrote:
> > On Fri, 2016-12-23 at 18:11 -0800, Andy Lutomirski wrote:
> >> On Fri, Dec 23, 2016 at 5:37 PM, Ricardo Neri
> >> wrote:
> >> > The feature User-Mode Instruction Prevention
On Tue, Dec 27, 2016 at 4:39 PM, Ricardo Neri
wrote:
> On Fri, 2016-12-23 at 18:11 -0800, Andy Lutomirski wrote:
>> On Fri, Dec 23, 2016 at 5:37 PM, Ricardo Neri
>> wrote:
>> > The feature User-Mode Instruction
On Tue, Dec 27, 2016 at 4:39 PM, Ricardo Neri
wrote:
> On Fri, 2016-12-23 at 18:11 -0800, Andy Lutomirski wrote:
>> On Fri, Dec 23, 2016 at 5:37 PM, Ricardo Neri
>> wrote:
>> > The feature User-Mode Instruction Prevention present in recent Intel
>> > processor prevents a group of instructions
On Mon, 2016-12-26 at 00:49 +0900, Masami Hiramatsu wrote:
> On Fri, 23 Dec 2016 17:37:43 -0800
> Ricardo Neri wrote:
>
> > +static int __identify_insn(struct insn *insn)
> > +{
> > + /* by getting modrm we also get the opcode */
> > +
On Mon, 2016-12-26 at 00:49 +0900, Masami Hiramatsu wrote:
> On Fri, 23 Dec 2016 17:37:43 -0800
> Ricardo Neri wrote:
>
> > +static int __identify_insn(struct insn *insn)
> > +{
> > + /* by getting modrm we also get the opcode */
> > + insn_get_modrm(insn);
> > + if (insn->opcode.bytes[0]
On Fri, 2016-12-23 at 18:11 -0800, Andy Lutomirski wrote:
> On Fri, Dec 23, 2016 at 5:37 PM, Ricardo Neri
> wrote:
> > The feature User-Mode Instruction Prevention present in recent Intel
> > processor prevents a group of instructions from being executed
On Fri, 2016-12-23 at 18:11 -0800, Andy Lutomirski wrote:
> On Fri, Dec 23, 2016 at 5:37 PM, Ricardo Neri
> wrote:
> > The feature User-Mode Instruction Prevention present in recent Intel
> > processor prevents a group of instructions from being executed with
> > CPL > 0. Otherwise, a general
On Fri, 23 Dec 2016 17:37:43 -0800
Ricardo Neri wrote:
> +static int __identify_insn(struct insn *insn)
> +{
> + /* by getting modrm we also get the opcode */
> + insn_get_modrm(insn);
> + if (insn->opcode.bytes[0] != 0xf)
> + return
On Fri, 23 Dec 2016 17:37:43 -0800
Ricardo Neri wrote:
> +static int __identify_insn(struct insn *insn)
> +{
> + /* by getting modrm we also get the opcode */
> + insn_get_modrm(insn);
> + if (insn->opcode.bytes[0] != 0xf)
> + return -EINVAL;
> +
> + if
On Fri, Dec 23, 2016 at 5:37 PM, Ricardo Neri
wrote:
> The feature User-Mode Instruction Prevention present in recent Intel
> processor prevents a group of instructions from being executed with
> CPL > 0. Otherwise, a general protection fault is issued.
>
>
On Fri, Dec 23, 2016 at 5:37 PM, Ricardo Neri
wrote:
> The feature User-Mode Instruction Prevention present in recent Intel
> processor prevents a group of instructions from being executed with
> CPL > 0. Otherwise, a general protection fault is issued.
>
> Rather than relaying this fault to the
The feature User-Mode Instruction Prevention present in recent Intel
processor prevents a group of instructions from being executed with
CPL > 0. Otherwise, a general protection fault is issued.
Rather than relaying this fault to the user space (in the form of a SIGSEGV
signal), the instructions
The feature User-Mode Instruction Prevention present in recent Intel
processor prevents a group of instructions from being executed with
CPL > 0. Otherwise, a general protection fault is issued.
Rather than relaying this fault to the user space (in the form of a SIGSEGV
signal), the instructions
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