Re: [v3] drm/msm: Fix race condition in msm driver with async layer updates

2020-10-16 Thread Rob Clark
On Fri, Oct 16, 2020 at 7:11 AM Krishna Manikandan wrote: > > When there are back to back commits with async cursor update, > there is a case where second commit can program the DPU hw > blocks while first didn't complete flushing config to HW. > > Synchronize the compositions such that second

[v3] drm/msm: Fix race condition in msm driver with async layer updates

2020-10-16 Thread Krishna Manikandan
When there are back to back commits with async cursor update, there is a case where second commit can program the DPU hw blocks while first didn't complete flushing config to HW. Synchronize the compositions such that second commit waits until first commit flushes the composition. This change