Re: [v6, 08/11] powerpc/powernv: Add platform support for stop instruction

2016-06-20 Thread Michael Neuling
> > > +#define OPAL_PM_TIMEBASE_STOP0x0002 > > > +#define OPAL_PM_LOSE_HYP_CONTEXT 0x2000 > > > +#define OPAL_PM_LOSE_FULL_CONTEXT0x4000 > > >  #define OPAL_PM_NAP_ENABLED 0x0001 > > >  #define OPAL_PM_SLEEP_ENABLED0x0002 > > >  #def

Re: [v6, 08/11] powerpc/powernv: Add platform support for stop instruction

2016-06-15 Thread Shreyas B Prabhu
Hi Michael, On 06/15/2016 04:44 PM, Michael Ellerman wrote: > Hi Shreyas, > > Comments inline ... > > On Wed, 2016-08-06 at 16:54:28 UTC, "Shreyas B. Prabhu" wrote: >> POWER ISA v3 defines a new idle processor core mechanism. In summary, >> a) new instruction named stop is added. This instructi

Re: [v6, 08/11] powerpc/powernv: Add platform support for stop instruction

2016-06-15 Thread Michael Ellerman
Hi Shreyas, Comments inline ... On Wed, 2016-08-06 at 16:54:28 UTC, "Shreyas B. Prabhu" wrote: > POWER ISA v3 defines a new idle processor core mechanism. In summary, > a) new instruction named stop is added. This instruction replaces > instructions like nap, sleep, rvwinkle. > b) new per

[PATCH v6 08/11] powerpc/powernv: Add platform support for stop instruction

2016-06-08 Thread Shreyas B. Prabhu
POWER ISA v3 defines a new idle processor core mechanism. In summary, a) new instruction named stop is added. This instruction replaces instructions like nap, sleep, rvwinkle. b) new per thread SPR named Processor Stop Status and Control Register (PSSCR) is added which controls th