Thanks Marc, Vladimir, Mark, Sudeep for your inputs!
Thanks
Neeraj
On 11/20/2020 3:43 PM, Mark Rutland wrote:
On Fri, Nov 20, 2020 at 09:09:00AM +, Vladimir Murzin wrote:
On 11/20/20 8:56 AM, Marc Zyngier wrote:
On 2020-11-20 04:30, Neeraj Upadhyay wrote:
Hi,
For ARM cortex A76, A77,
On Fri, Nov 20, 2020 at 08:56:31AM +, Marc Zyngier wrote:
> On 2020-11-20 04:30, Neeraj Upadhyay wrote:
> > Hi,
> >
> > For ARM cortex A76, A77, A78 cores (which as per TRM, support AMU)
> > AA64PFR0[47:44] field is not set, and AMU does not get enabled for
> > them.
> > Can you please provide
On 11/20/20 9:54 AM, Marc Zyngier wrote:
> On 2020-11-20 09:09, Vladimir Murzin wrote:
>> On 11/20/20 8:56 AM, Marc Zyngier wrote:
>>> On 2020-11-20 04:30, Neeraj Upadhyay wrote:
Hi,
For ARM cortex A76, A77, A78 cores (which as per TRM, support AMU)
AA64PFR0[47:44] field is not
On Fri, Nov 20, 2020 at 09:09:00AM +, Vladimir Murzin wrote:
> On 11/20/20 8:56 AM, Marc Zyngier wrote:
> > On 2020-11-20 04:30, Neeraj Upadhyay wrote:
> >> Hi,
> >>
> >> For ARM cortex A76, A77, A78 cores (which as per TRM, support AMU)
> >> AA64PFR0[47:44] field is not set, and AMU does not g
On 2020-11-20 09:09, Vladimir Murzin wrote:
On 11/20/20 8:56 AM, Marc Zyngier wrote:
On 2020-11-20 04:30, Neeraj Upadhyay wrote:
Hi,
For ARM cortex A76, A77, A78 cores (which as per TRM, support AMU)
AA64PFR0[47:44] field is not set, and AMU does not get enabled for
them.
Can you please provid
On 11/20/20 8:56 AM, Marc Zyngier wrote:
> On 2020-11-20 04:30, Neeraj Upadhyay wrote:
>> Hi,
>>
>> For ARM cortex A76, A77, A78 cores (which as per TRM, support AMU)
>> AA64PFR0[47:44] field is not set, and AMU does not get enabled for
>> them.
>> Can you please provide support for these CPUs in c
On 2020-11-20 04:30, Neeraj Upadhyay wrote:
Hi,
For ARM cortex A76, A77, A78 cores (which as per TRM, support AMU)
AA64PFR0[47:44] field is not set, and AMU does not get enabled for
them.
Can you please provide support for these CPUs in cpufeature.c?
If that was the case, that'd be an erratum,
Hi,
For ARM cortex A76, A77, A78 cores (which as per TRM, support AMU)
AA64PFR0[47:44] field is not set, and AMU does not get enabled for them.
Can you please provide support for these CPUs in cpufeature.c?
Thanks
Neeraj
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