On 10/08/2019 10:47, Ming Lei wrote:
On Tue, Jul 23, 2019 at 1:40 AM John Garry wrote:
On 22/07/2019 16:34, Thomas Gleixner wrote:
John,
Hi Thomas,
On Mon, 22 Jul 2019, John Garry wrote:
On 22/07/2019 15:41, Marc Zyngier wrote:
On 22/07/2019 15:14, John Garry wrote:
I have a question
On Tue, Jul 23, 2019 at 1:40 AM John Garry wrote:
>
> On 22/07/2019 16:34, Thomas Gleixner wrote:
> > John,
> >
>
> Hi Thomas,
>
> > On Mon, 22 Jul 2019, John Garry wrote:
> >> On 22/07/2019 15:41, Marc Zyngier wrote:
> >>> On 22/07/2019 15:14, John Garry wrote:
> I have a question on commit
Probably because the other CPU(s)
in the affinity set are less loaded than the one which handles the hard
interrupt.
I will look to get some figures for CPU loading to back this up.
As promised, here are some CPU loading figures before and after the
change to make the thread CPU affinity
On 22/07/2019 16:34, Thomas Gleixner wrote:
John,
Hi Thomas,
On Mon, 22 Jul 2019, John Garry wrote:
On 22/07/2019 15:41, Marc Zyngier wrote:
On 22/07/2019 15:14, John Garry wrote:
I have a question on commit cbf866a6 ("genirq: Let irq thread follow
the effective hard irq affinity"), i
John,
On Mon, 22 Jul 2019, John Garry wrote:
> On 22/07/2019 15:41, Marc Zyngier wrote:
> > On 22/07/2019 15:14, John Garry wrote:
> > > I have a question on commit cbf866a6 ("genirq: Let irq thread follow
> > > the effective hard irq affinity"), if you could kindly check:
> > >
> > > Here we
On 22/07/2019 15:41, Marc Zyngier wrote:
Hi John,
Hi Marc,
On 22/07/2019 15:14, John Garry wrote:
Hi Thomas,
I have a question on commit cbf866a6 ("genirq: Let irq thread follow
the effective hard irq affinity"), if you could kindly check:
Here we set the thread affinity to be the sam
Hi John,
On 22/07/2019 15:14, John Garry wrote:
> Hi Thomas,
>
> I have a question on commit cbf866a6 ("genirq: Let irq thread follow
> the effective hard irq affinity"), if you could kindly check:
>
> Here we set the thread affinity to be the same as the hard interrupt
> affinity. For an
Hi Thomas,
I have a question on commit cbf866a6 ("genirq: Let irq thread follow
the effective hard irq affinity"), if you could kindly check:
Here we set the thread affinity to be the same as the hard interrupt
affinity. For an arm64 system with GIC ITS, this will be a single CPU,
the lo
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