Re: Design of interrupt controller driver

2017-06-06 Thread Thomas Gleixner
On Tue, 6 Jun 2017, Mason wrote: > On 06/06/2017 09:39, Thomas Gleixner wrote: > What about disable_irq(virq); > That function /is/ exported API, and eventually calls mask_irq. > > disable_irq -> __disable_irq_nosync -> __disable_irq -> irq_disable -> > mask_irq What you can call from an ISR is

Re: Design of interrupt controller driver

2017-06-06 Thread Mason
On 06/06/2017 09:39, Thomas Gleixner wrote: > On Mon, 5 Jun 2017, Mason wrote: > >> Is it possible to call the interrupt controller's mask callback >> from the DMA engine driver ISR, or is that reserved for the IRQ >> framework? Because that's what the HW designers had in mind, >> thus they didn't

Re: Design of interrupt controller driver

2017-06-06 Thread Thomas Gleixner
On Mon, 5 Jun 2017, Mason wrote: > Is it possible to call the interrupt controller's mask callback > from the DMA engine driver ISR, or is that reserved for the IRQ > framework? Because that's what the HW designers had in mind, > thus they didn't provide a way to mask the interrupt in the > device.

Re: Design of interrupt controller driver

2017-06-05 Thread Mason
On 05/06/2017 10:23, Thomas Gleixner wrote: > On Mon, 5 Jun 2017, Mason wrote: >> On 04/06/2017 22:13, Thomas Gleixner wrote: >>> When you configure the interrupt as edge then you cannot share it. No >>> matter whether it stays high or not. >> >> Could you explain why? (I must be missing something.

Re: Design of interrupt controller driver

2017-06-05 Thread Thomas Gleixner
On Mon, 5 Jun 2017, Mason wrote: > On 04/06/2017 22:13, Thomas Gleixner wrote: > > When you configure the interrupt as edge then you cannot share it. No > > matter whether it stays high or not. > > Could you explain why? (I must be missing something.) Device ADevice B Combined Output Edg

Re: Design of interrupt controller driver

2017-06-04 Thread Mason
On 04/06/2017 22:13, Thomas Gleixner wrote: > On Sun, 4 Jun 2017, Mason wrote: >> On 04/06/2017 15:55, Thomas Gleixner wrote: As for the DMA interrupt, the HW designers consider it a level interrupt. When the engine is busy processing a command, the interrupt signal is low; when the

Re: Design of interrupt controller driver

2017-06-04 Thread Thomas Gleixner
On Sun, 4 Jun 2017, Mason wrote: > On 04/06/2017 15:55, Thomas Gleixner wrote: > >> As for the DMA interrupt, the HW designers consider it > >> a level interrupt. When the engine is busy processing > >> a command, the interrupt signal is low; when the engine's > >> command queue is empty, the inter

Re: Design of interrupt controller driver

2017-06-04 Thread Mason
On 04/06/2017 15:55, Thomas Gleixner wrote: > On Sat, 3 Jun 2017, Mason wrote: > >> 1) The interrupt router has 128 inputs and 24 outputs. >> Therefore, several devices have to share an output line. >> I believe they *must* be of the same interrupt type? >> In the limit, we could use >> - 1 output

Re: Design of interrupt controller driver

2017-06-04 Thread Thomas Gleixner
On Sat, 3 Jun 2017, Mason wrote: > 1) The interrupt router has 128 inputs and 24 outputs. > Therefore, several devices have to share an output line. > I believe they *must* be of the same interrupt type? > In the limit, we could use > - 1 output line for level high > - 1 output line for level low >

Re: Design of interrupt controller driver

2017-06-03 Thread Mason
On 03/06/2017 18:49, Mason wrote: > 1) The interrupt router has 128 inputs and 24 outputs. > Therefore, several devices have to share an output line. > I believe they *must* be of the same interrupt type? > In the limit, we could use > - 1 output line for level high > - 1 output line for level low

Design of interrupt controller driver

2017-06-03 Thread Mason
Hello, My previous thread was a dud. I will post a formal patch on Tuesday, but I would like to clarify a few nagging doubts, the answer to which have an impact on the driver's design. 1) The interrupt router has 128 inputs and 24 outputs. Therefore, several devices have to share an output line.