Hi Pierre,
Thanks for explaining.
I guess then I have a crappy SDIO card that needs the "voodoo" bit set
for correct operation. There are other registers close to the START
ADDRESS so it is a FIFO, but the Incrementing Address flag is needed to
read from and write to the FIFO correctly.
On Wed, 21 Nov 2007 11:57:01 +
Dean Jenkins <[EMAIL PROTECTED]> wrote:
> Hi Pierre,
>
> I've looked at the SD Card Association's SDIO Part E1 V2.00
> specification concerning the Incrementing Address OP Code field for
> CMD53.
>
> The specification indicates that the START ADDRESS is
Hi Pierre,
I've looked at the SD Card Association's SDIO Part E1 V2.00
specification concerning the Incrementing Address OP Code field for
CMD53.
The specification indicates that the START ADDRESS is inserted into the
Register Address register field. When the OP Code field has a value of 1
then
Hi Pierre,
I've looked at the SD Card Association's SDIO Part E1 V2.00
specification concerning the Incrementing Address OP Code field for
CMD53.
The specification indicates that the START ADDRESS is inserted into the
Register Address register field. When the OP Code field has a value of 1
then
On Wed, 21 Nov 2007 11:57:01 +
Dean Jenkins [EMAIL PROTECTED] wrote:
Hi Pierre,
I've looked at the SD Card Association's SDIO Part E1 V2.00
specification concerning the Incrementing Address OP Code field for
CMD53.
The specification indicates that the START ADDRESS is inserted into
Hi Pierre,
Thanks for explaining.
I guess then I have a crappy SDIO card that needs the voodoo bit set
for correct operation. There are other registers close to the START
ADDRESS so it is a FIFO, but the Incrementing Address flag is needed to
read from and write to the FIFO correctly.
Regards,
On Tue, 20 Nov 2007 14:52:37 +
Dean Jenkins <[EMAIL PROTECTED]> wrote:
> Hi Pierre,
>
> My card driver needed to set the R/W E4MI bit in the Card Capability
> register (0x08) in CCCR (function 0). Perhaps it is unnecessary ?
>
That bit is pointless given the current design of the MMC
Hi Pierre,
My card driver needed to set the R/W E4MI bit in the Card Capability
register (0x08) in CCCR (function 0). Perhaps it is unnecessary ?
BTW. It is easy to for the card driver to access function 0 registers by
doing the following...
...
int old_num = func->num; /* note the
On Tue, 20 Nov 2007 12:26:11 +
Dean Jenkins <[EMAIL PROTECTED]> wrote:
> Hi Pierre,
>
> IMHO the issue is there is no upper bound limit to the valid address
> range in sdio_io_rw_ext_helper() in sdio_io.c.
>
> I call sdio_memcpy_toio() as it enables the incrementing address flag in
> the
Hi Pierre,
IMHO the issue is there is no upper bound limit to the valid address
range in sdio_io_rw_ext_helper() in sdio_io.c.
I call sdio_memcpy_toio() as it enables the incrementing address flag in
the CMD53 command but if I try passing too much data then the actual
address of the subsequent
On Mon, 19 Nov 2007 11:44:54 +
Dean Jenkins <[EMAIL PROTECTED]> wrote:
> This E-mail is for the attention of Pierre Ossman (MMC sub-system
> maintainer)
A cc helps if you want my attention. ;)
>
> Hi Pierre,
>
> I've being trying to get SDIO block-mode with incrementing address to
> work
On Mon, 19 Nov 2007 11:44:54 +
Dean Jenkins [EMAIL PROTECTED] wrote:
This E-mail is for the attention of Pierre Ossman (MMC sub-system
maintainer)
A cc helps if you want my attention. ;)
Hi Pierre,
I've being trying to get SDIO block-mode with incrementing address to
work on an
Hi Pierre,
IMHO the issue is there is no upper bound limit to the valid address
range in sdio_io_rw_ext_helper() in sdio_io.c.
I call sdio_memcpy_toio() as it enables the incrementing address flag in
the CMD53 command but if I try passing too much data then the actual
address of the subsequent
On Tue, 20 Nov 2007 12:26:11 +
Dean Jenkins [EMAIL PROTECTED] wrote:
Hi Pierre,
IMHO the issue is there is no upper bound limit to the valid address
range in sdio_io_rw_ext_helper() in sdio_io.c.
I call sdio_memcpy_toio() as it enables the incrementing address flag in
the CMD53
Hi Pierre,
My card driver needed to set the R/W E4MI bit in the Card Capability
register (0x08) in CCCR (function 0). Perhaps it is unnecessary ?
BTW. It is easy to for the card driver to access function 0 registers by
doing the following...
...
int old_num = func-num; /* note the
On Tue, 20 Nov 2007 14:52:37 +
Dean Jenkins [EMAIL PROTECTED] wrote:
Hi Pierre,
My card driver needed to set the R/W E4MI bit in the Card Capability
register (0x08) in CCCR (function 0). Perhaps it is unnecessary ?
That bit is pointless given the current design of the MMC layer, so it
This E-mail is for the attention of Pierre Ossman (MMC sub-system
maintainer)
Hi Pierre,
I've being trying to get SDIO block-mode with incrementing address to
work on an OMAP2430 based reference board with an SDIO card.
Looking at the latest code ( as of 19/11/2007 ) on the mmc-git tree (I'm
This E-mail is for the attention of Pierre Ossman (MMC sub-system
maintainer)
Hi Pierre,
I've being trying to get SDIO block-mode with incrementing address to
work on an OMAP2430 based reference board with an SDIO card.
Looking at the latest code ( as of 19/11/2007 ) on the mmc-git tree (I'm
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