This is my third version of this patch set, but the original cover
letter is still the most relevant description I can come up with.
This patch set has been sitting around for a while, but it got a bit lost
in the shuffle. In RISC-V land we currently couple do_IRQ (the C entry
point f
On Fri, 09 Mar 2018 15:00:56 PST (-0800), t...@linutronix.de wrote:
On Fri, 9 Mar 2018, Palmer Dabbelt wrote:
On Fri, 09 Mar 2018 02:20:12 PST (-0800), t...@linutronix.de wrote:
> This looks sensible. We have two options for getting this merged:
>
> 1) I'll take the whole lot through tip/irq/c
On Fri, 9 Mar 2018, Palmer Dabbelt wrote:
> On Fri, 09 Mar 2018 02:20:12 PST (-0800), t...@linutronix.de wrote:
> > This looks sensible. We have two options for getting this merged:
> >
> > 1) I'll take the whole lot through tip/irq/core
> >
> > 2) I'll apply patch 1/N to a special branch in
On Fri, 09 Mar 2018 02:20:12 PST (-0800), t...@linutronix.de wrote:
On Wed, 7 Mar 2018, Palmer Dabbelt wrote:
This is my third version of this patch set, but the original cover
letter is still the most relevant description I can come up with.
This patch set has been sitting around for a wh
On Wed, 7 Mar 2018, Palmer Dabbelt wrote:
> This is my third version of this patch set, but the original cover
> letter is still the most relevant description I can come up with.
>
> This patch set has been sitting around for a while, but it got a bit lost
> in the shuffle. In RISC-V lan
This is my third version of this patch set, but the original cover
letter is still the most relevant description I can come up with.
This patch set has been sitting around for a while, but it got a bit lost
in the shuffle. In RISC-V land we currently couple do_IRQ (the C entry
point f
On Wed, 24 Jan 2018, Palmer Dabbelt wrote:
> It looks like this same irqchip registration mechanism has been copied
> into a handful of ports, including aarch64 and openrisc. I want to use
> this in the RISC-V port, so I thought it would be good to make this
> generic instead.
>
> This patch sim
On Wed, Jan 24, 2018 at 07:07:53PM -0800, Palmer Dabbelt wrote:
> It looks like this same irqchip registration mechanism has been copied
> into a handful of ports, including aarch64 and openrisc. I want to use
> this in the RISC-V port, so I thought it would be good to make this
> generic instead.
This is the second version of a patch set titled "Use arm64's scheme for
registering first-level IRQ handlers on RISC-V". That patch set's cover letter
is still the best way to describe what's going on, so I'm just copying it here:
This patch set has been sitting around for a while, but it go
It looks like this same irqchip registration mechanism has been copied
into a handful of ports, including aarch64 and openrisc. I want to use
this in the RISC-V port, so I thought it would be good to make this
generic instead.
This patch simply moves set_handle_irq and handle_arch_irq from arch/a
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