On Fri, Dec 08, 2000 at 03:31:08PM +0100, Benjamin Herrenschmidt wrote:
> The problem I have (and this is why I don't setup host resources
> properly on multi-host PPCs yet) is that some hosts can have several
> non-contiguous ranges (especially with memory, IO is usually a single
> contiguous
On Fri, Dec 08, 2000 at 03:31:08PM +0100, Benjamin Herrenschmidt wrote:
The problem I have (and this is why I don't setup host resources
properly on multi-host PPCs yet) is that some hosts can have several
non-contiguous ranges (especially with memory, IO is usually a single
contiguous
>
>No, pci_read_bridge_bases() is obsoleted by new pci setup code. ;-)
>You have to set up bus resources properly in pcibios_fixup_bus().
>For a single root bus configuration, you don't need to do anything
>with the root bus itself - its resources already point to ioport_resource
>and
On Thu, Dec 07, 2000 at 10:46:08PM +, Russell King wrote:
> It appears to be caused by the pci_read_bridge_bases code copying the
> pointer to the resources instead of making a copy of the resources
> themselves.
No, pci_read_bridge_bases() is obsoleted by new pci setup code. ;-)
You have to
On Thu, Dec 07, 2000 at 10:46:08PM +, Russell King wrote:
It appears to be caused by the pci_read_bridge_bases code copying the
pointer to the resources instead of making a copy of the resources
themselves.
No, pci_read_bridge_bases() is obsoleted by new pci setup code. ;-)
You have to
No, pci_read_bridge_bases() is obsoleted by new pci setup code. ;-)
You have to set up bus resources properly in pcibios_fixup_bus().
For a single root bus configuration, you don't need to do anything
with the root bus itself - its resources already point to ioport_resource
and iomem_resource,
Hi,
Kernel 2.4.0-test12-pre7
There appears to be a possibility whereby the root resources (ioport_resource
and iomem_resource) can get modified by the PCI code:
Unknown bridge resource 0: assuming transparent
Unknown bridge resource 1: assuming transparent
Unknown bridge resource 2: assuming
Hi,
Kernel 2.4.0-test12-pre7
There appears to be a possibility whereby the root resources (ioport_resource
and iomem_resource) can get modified by the PCI code:
Unknown bridge resource 0: assuming transparent
Unknown bridge resource 1: assuming transparent
Unknown bridge resource 2: assuming
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