On Sat, 2016-01-02 at 19:35 +0100, Mike Looijmans wrote:
> On 2-1-2016 11:39, Russell King - ARM Linux wrote:
> > On Thu, Dec 31, 2015 at 04:50:54PM +0900, Masahiro Yamada wrote:
> > > Hi.
> > >
> > > I am new to the Linux DMA APIs.
> > >
> > > First, I started by reading Documentation/DMA-API.tx
On 2-1-2016 11:39, Russell King - ARM Linux wrote:
On Thu, Dec 31, 2015 at 04:50:54PM +0900, Masahiro Yamada wrote:
Hi.
I am new to the Linux DMA APIs.
First, I started by reading Documentation/DMA-API.txt,
but I am confused with the term "consistent memory".
Just read "coherent memory" inst
On Sat, Jan 02, 2016 at 08:17:51AM -0800, James Bottomley wrote:
> On Sat, 2016-01-02 at 10:39 +, Russell King - ARM Linux wrote:
> > On Thu, Dec 31, 2015 at 04:50:54PM +0900, Masahiro Yamada wrote:
> > > Hi.
> > >
> > > I am new to the Linux DMA APIs.
> > >
> > > First, I started by reading
On Sat, 2016-01-02 at 10:39 +, Russell King - ARM Linux wrote:
> On Thu, Dec 31, 2015 at 04:50:54PM +0900, Masahiro Yamada wrote:
> > Hi.
> >
> > I am new to the Linux DMA APIs.
> >
> > First, I started by reading Documentation/DMA-API.txt,
> > but I am confused with the term "consistent memo
On Thu, Dec 31, 2015 at 11:57:55PM +0900, Masahiro Yamada wrote:
> [1] DMA-coherent buffers
>
> Allocate buffers with dma_alloc_coherent()
> and just have access to the buffers without cache synchronization.
>
> There is no need to call dma_sync_single_for_*().
dma_sync_single_for_*() is part of
On Thu, Dec 31, 2015 at 04:50:54PM +0900, Masahiro Yamada wrote:
> Hi.
>
> I am new to the Linux DMA APIs.
>
> First, I started by reading Documentation/DMA-API.txt,
> but I am confused with the term "consistent memory".
Just read "coherent memory" instead - the documentation confusingly uses
th
On 31-12-2015 15:57, Masahiro Yamada wrote:
Hi Alan, Mike,
Thanks for your help!
2015-12-31 19:25 GMT+09:00 One Thousand Gnomes :
In a system like Fig.2, is the memory non-consistent?
dma_alloc_coherent will always provide you with coherent memory. On a
machine with good cache interfaces
Hi Alan, Mike,
Thanks for your help!
2015-12-31 19:25 GMT+09:00 One Thousand Gnomes :
>>
>> In a system like Fig.2, is the memory non-consistent?
>
> dma_alloc_coherent will always provide you with coherent memory. On a
> machine with good cache interfaces it will provide you with normal
> memo
On Thu, 31 Dec 2015 16:50:54 +0900
> But, I think such a system is rare.
Actually its quite normal for some vendors processors but not others.
> At least on my SoC (ARM SoC), DMA controllers
> for NAND, MMC, etc. are directly connected to the DRAM
> like Fig.2.
>
> So, cache operations must be e
On 31-12-15 08:50, Masahiro Yamada wrote:
Hi.
I am new to the Linux DMA APIs.
First, I started by reading Documentation/DMA-API.txt,
but I am confused with the term "consistent memory".
Please help me understand the document correctly.
The DMA-API.txt says as follows:
--
Hi.
I am new to the Linux DMA APIs.
First, I started by reading Documentation/DMA-API.txt,
but I am confused with the term "consistent memory".
Please help me understand the document correctly.
The DMA-API.txt says as follows:
--->8-
[ Added Paul in CC ]
On Jan 28, 2008 11:29 AM, Haavard Skinnemoen <[EMAIL PROTECTED]> wrote:
> On Mon, 28 Jan 2008 11:22:49 +0100
> "Francis Moreau" <[EMAIL PROTECTED]> wrote:
>
> > > Please let me know if you think this will work for your hardware.
> >
> > Thanks for pointing this out. I currentl
On Mon, 28 Jan 2008 11:22:49 +0100
"Francis Moreau" <[EMAIL PROTECTED]> wrote:
> > Please let me know if you think this will work for your hardware.
>
> Thanks for pointing this out. I currently can't look at this but I'll
> try to give it
> a deep look this week.
Great. I'll Cc you on the nex
Hello Haavard,
On Jan 28, 2008 10:21 AM, Haavard Skinnemoen <[EMAIL PROTECTED]> wrote:
> On Mon, 28 Jan 2008 09:55:58 +0100
> "Francis Moreau" <[EMAIL PROTECTED]> wrote:
>
> > My DMA controller has very little in common with ISA DMA one. But I'd like
> > to
> > use it in a driver. This driver can
On Jan 28, 2008 10:04 AM, Jiri Slaby <[EMAIL PROTECTED]> wrote:
> On 01/28/2008 09:55 AM, Francis Moreau wrote:
> Which bus is it in this case?
Basically it's a bus which is used to access memories.
Thanks
--
Francis
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On Mon, 28 Jan 2008 09:55:58 +0100
"Francis Moreau" <[EMAIL PROTECTED]> wrote:
> My DMA controller has very little in common with ISA DMA one. But I'd like to
> use it in a driver. This driver can do DMA but with the help of an external
> DMA
> controller. It's only implement the "slave" side. So
On 01/28/2008 09:55 AM, Francis Moreau wrote:
No ;)
Heh :)
My DMA controller has very little in common with ISA DMA one. But I'd like to
use it in a driver. This driver can do DMA but with the help of an external DMA
controller. It's only implement the "slave" side. So basically this driver n
Hello Jiri,
On Jan 27, 2008 11:34 PM, Jiri Slaby <[EMAIL PROTECTED]> wrote:
> On 01/27/2008 09:51 PM, Francis Moreau wrote:
> > 1/ Why does the function take only one address ? I would expect it
> > to take both a source and a destination address for the dma controller
> > to transfer data.
>
> s
On 01/27/2008 09:51 PM, Francis Moreau wrote:
Hello,
I have 2 questions regarding set_dma_addr(unsigned int channel,
unsigned int addr) helper.
1/ Why does the function take only one address ? I would expect it
to take both a source and a destination address for the dma controller
to transfer
Hello,
I have 2 questions regarding set_dma_addr(unsigned int channel,
unsigned int addr) helper.
1/ Why does the function take only one address ? I would expect it
to take both a source and a destination address for the dma controller
to transfer data.
2/ The type of address parameter is an un
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