>> > there's something I don't understand: With IRQBALANCE *enabled* almost
>> > all interrupts are processed on CPU0. This changed in an unexpected way
>> > after disabling IRQBALANCE: now all interrupts are distributed uniformly
>> > to both CPUs. Maybe it's intentional, but it's not what I
there's something I don't understand: With IRQBALANCE *enabled* almost
all interrupts are processed on CPU0. This changed in an unexpected way
after disabling IRQBALANCE: now all interrupts are distributed uniformly
to both CPUs. Maybe it's intentional, but it's not what I expect when a
Joerg Sommrey wrote:
On Fri, Feb 18, 2005 at 02:39:49PM -0800, Martin J. Bligh wrote:
there's something I don't understand: With IRQBALANCE *enabled* almost
all interrupts are processed on CPU0. This changed in an unexpected way
after disabling IRQBALANCE: now all interrupts are distributed
On Fri, Feb 18, 2005 at 02:39:49PM -0800, Martin J. Bligh wrote:
> >
> > there's something I don't understand: With IRQBALANCE *enabled* almost
> > all interrupts are processed on CPU0. This changed in an unexpected way
> > after disabling IRQBALANCE: now all interrupts are distributed
>
> there's something I don't understand: With IRQBALANCE *enabled* almost
> all interrupts are processed on CPU0. This changed in an unexpected way
> after disabling IRQBALANCE: now all interrupts are distributed uniformly
> to both CPUs. Maybe it's intentional, but it's not what I expect
Hi all,
there's something I don't understand: With IRQBALANCE *enabled* almost
all interrupts are processed on CPU0. This changed in an unexpected way
after disabling IRQBALANCE: now all interrupts are distributed uniformly
to both CPUs. Maybe it's intentional, but it's not what I expect when
Hi all,
there's something I don't understand: With IRQBALANCE *enabled* almost
all interrupts are processed on CPU0. This changed in an unexpected way
after disabling IRQBALANCE: now all interrupts are distributed uniformly
to both CPUs. Maybe it's intentional, but it's not what I expect when
there's something I don't understand: With IRQBALANCE *enabled* almost
all interrupts are processed on CPU0. This changed in an unexpected way
after disabling IRQBALANCE: now all interrupts are distributed uniformly
to both CPUs. Maybe it's intentional, but it's not what I expect when a
On Fri, Feb 18, 2005 at 02:39:49PM -0800, Martin J. Bligh wrote:
there's something I don't understand: With IRQBALANCE *enabled* almost
all interrupts are processed on CPU0. This changed in an unexpected way
after disabling IRQBALANCE: now all interrupts are distributed uniformly
to
Joerg Sommrey wrote:
On Fri, Feb 18, 2005 at 02:39:49PM -0800, Martin J. Bligh wrote:
there's something I don't understand: With IRQBALANCE *enabled* almost
all interrupts are processed on CPU0. This changed in an unexpected way
after disabling IRQBALANCE: now all interrupts are distributed
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