On Tue, Mar 26, 2019 at 07:15:29PM +, Ghannam, Yazen wrote:
> Just tested on a fully populated system. Everything seems to be okay.
Thanks, queued.
--
Regards/Gruss,
Boris.
Good mailing practices for 400: avoid top-posting and trim the reply.
> -Original Message-
> From: Borislav Petkov
> Sent: Tuesday, March 26, 2019 10:55 AM
> To: Ghannam, Yazen
> Cc: linux-e...@vger.kernel.org; linux-kernel@vger.kernel.org
> Subject: Re: [PATCH] EDAC/amd64: Use maximum channel count for the EDAC
> channel layer siz
On Mon, Mar 25, 2019 at 08:33:30PM +, Ghannam, Yazen wrote:
> From: Yazen Ghannam
>
> The AMD64 EDAC module current hardcodes the EDAC channel layer size
> (count) to two. Future AMD systems may have more channels than this.
>
> Set the EDAC channel layer size equal to the maximum number of
3 matches
Mail list logo