Re: [PATCH] PCI: xilinx-nwl: Enable coherenct PCIe traffic using CCI

2021-01-27 Thread Rob Herring
On Thu, Jan 21, 2021 at 10:28 AM Bjorn Helgaas wrote: > > [+cc Rob] > > s/coherenct/coherent/ in subject > s/traffic/DMA/ (this applies specifically to DMA, not to MMIO) > > On Thu, Jan 21, 2021 at 03:29:16PM +0530, Bharat Kumar Gogada wrote: > > - Add support for routing PCIe traffic coherently w

Re: [PATCH] PCI: xilinx-nwl: Enable coherenct PCIe traffic using CCI

2021-01-27 Thread Bjorn Helgaas
On Wed, Jan 27, 2021 at 05:03:12AM +, Bharat Kumar Gogada wrote: > > On Thu, Jan 21, 2021 at 03:29:16PM +0530, Bharat Kumar Gogada wrote: > Here is the CCI spec > https://developer.arm.com/documentation/ddi0470/k/preface I'm sure it was obvious, but please include this in the commit log as w

RE: [PATCH] PCI: xilinx-nwl: Enable coherenct PCIe traffic using CCI

2021-01-26 Thread Bharat Kumar Gogada
> [+cc Rob] > > s/coherenct/coherent/ in subject > s/traffic/DMA/ (this applies specifically to DMA, not to MMIO) > > On Thu, Jan 21, 2021 at 03:29:16PM +0530, Bharat Kumar Gogada wrote: > > - Add support for routing PCIe traffic coherently when Cache Coherent > > Interconnect(CCI) is enabled in

Re: [PATCH] PCI: xilinx-nwl: Enable coherenct PCIe traffic using CCI

2021-01-21 Thread Bjorn Helgaas
[+cc Rob] s/coherenct/coherent/ in subject s/traffic/DMA/ (this applies specifically to DMA, not to MMIO) On Thu, Jan 21, 2021 at 03:29:16PM +0530, Bharat Kumar Gogada wrote: > - Add support for routing PCIe traffic coherently when > Cache Coherent Interconnect(CCI) is enabled in the system. s/