[]..
>> ---
>>
>> Stan,
>> If there was a specific issue you saw with venus because of the missing
>> delay and poll, can you check if this fixes any of that.
>>
>> drivers/clk/qcom/gdsc.c | 58
>> ++---
>> 1 file changed, 45 insertions(+), 13
[]..
>> ---
>>
>> Stan,
>> If there was a specific issue you saw with venus because of the missing
>> delay and poll, can you check if this fixes any of that.
>>
>> drivers/clk/qcom/gdsc.c | 58
>> ++---
>> 1 file changed, 45 insertions(+), 13
On 01/21/2017 04:50 AM, Stephen Boyd wrote:
> On 01/10, Stanimir Varbanov wrote:
>>
>>> + udelay(1);
>>> +
>>> + reg = sc->gds_hw_ctrl ? sc->gds_hw_ctrl : sc->gdscr;
>>> + ret = gdsc_poll_status(sc, reg, 0);
>>
>> This should be gdsc_poll_status(sc, reg, true)
On 01/21/2017 04:50 AM, Stephen Boyd wrote:
> On 01/10, Stanimir Varbanov wrote:
>>
>>> + udelay(1);
>>> +
>>> + reg = sc->gds_hw_ctrl ? sc->gds_hw_ctrl : sc->gdscr;
>>> + ret = gdsc_poll_status(sc, reg, 0);
>>
>> This should be gdsc_poll_status(sc, reg, true)
On 01/10, Stanimir Varbanov wrote:
>
> > + udelay(1);
> > +
> > + reg = sc->gds_hw_ctrl ? sc->gds_hw_ctrl : sc->gdscr;
> > + ret = gdsc_poll_status(sc, reg, 0);
>
> This should be gdsc_poll_status(sc, reg, true) because after disabling
> hw_control we expect that
On 01/10, Stanimir Varbanov wrote:
>
> > + udelay(1);
> > +
> > + reg = sc->gds_hw_ctrl ? sc->gds_hw_ctrl : sc->gdscr;
> > + ret = gdsc_poll_status(sc, reg, 0);
>
> This should be gdsc_poll_status(sc, reg, true) because after disabling
> hw_control we expect that
gt;<rna...@codeaurora.org>; sb...@codeaurora.org; mturque...@baylibre.com
>Cc: linux-...@vger.kernel.org; linux-arm-...@vger.kernel.org;
>linux-kernel@vger.kernel.org
>Subject: Re: [PATCH] clk: qcom: gdsc: Fix handling of hw control enable/disable
>
>Hi Sricharan,
>
>On 01/10/2017 09
kernel.org; linux-arm-...@vger.kernel.org;
>linux-kernel@vger.kernel.org
>Subject: Re: [PATCH] clk: qcom: gdsc: Fix handling of hw control enable/disable
>
>Hi Sricharan,
>
>On 01/10/2017 09:29 PM, Sricharan wrote:
>> Hi stan,
>>
>>> -Original Message-
>
PM
>> To: Rajendra Nayak <rna...@codeaurora.org>; sb...@codeaurora.org;
>> mturque...@baylibre.com
>> Cc: linux-...@vger.kernel.org; linux-arm-...@vger.kernel.org;
>> linux-kernel@vger.kernel.org; sricha...@codeaurora.org
>> Subject: Re: [PATCH] clk: qcom: gds
PM
>> To: Rajendra Nayak ; sb...@codeaurora.org;
>> mturque...@baylibre.com
>> Cc: linux-...@vger.kernel.org; linux-arm-...@vger.kernel.org;
>> linux-kernel@vger.kernel.org; sricha...@codeaurora.org
>> Subject: Re: [PATCH] clk: qcom: gdsc: Fix handling of hw control
&g
rque...@baylibre.com
>Cc: linux-...@vger.kernel.org; linux-arm-...@vger.kernel.org;
>linux-kernel@vger.kernel.org; sricha...@codeaurora.org
>Subject: Re: [PATCH] clk: qcom: gdsc: Fix handling of hw control enable/disable
>
>Hi Rajendra,
>
>On 01/10/2017 07:54 AM, Rajendra Naya
bre.com
>Cc: linux-...@vger.kernel.org; linux-arm-...@vger.kernel.org;
>linux-kernel@vger.kernel.org; sricha...@codeaurora.org
>Subject: Re: [PATCH] clk: qcom: gdsc: Fix handling of hw control enable/disable
>
>Hi Rajendra,
>
>On 01/10/2017 07:54 AM, Rajendra Nayak wrote:
>> On
Hi Rajendra,
On 01/10/2017 07:54 AM, Rajendra Nayak wrote:
> Once a gdsc is brought in and out of HW control, there is a
> power down and up cycle which can take upto 1us. Polling on
> the gdsc status immediately after the hw control enable/disable
> can mislead software/firmware to belive the
Hi Rajendra,
On 01/10/2017 07:54 AM, Rajendra Nayak wrote:
> Once a gdsc is brought in and out of HW control, there is a
> power down and up cycle which can take upto 1us. Polling on
> the gdsc status immediately after the hw control enable/disable
> can mislead software/firmware to belive the
Hi Rajendra,
Thanks for the patch!
On 01/10/2017 07:54 AM, Rajendra Nayak wrote:
> Once a gdsc is brought in and out of HW control, there is a
> power down and up cycle which can take upto 1us. Polling on
> the gdsc status immediately after the hw control enable/disable
> can mislead
Hi Rajendra,
Thanks for the patch!
On 01/10/2017 07:54 AM, Rajendra Nayak wrote:
> Once a gdsc is brought in and out of HW control, there is a
> power down and up cycle which can take upto 1us. Polling on
> the gdsc status immediately after the hw control enable/disable
> can mislead
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