On 23/10/2017 10:01, Kang, Luwei wrote:
>
>>> So, can we enable it in L1
>>> guest only first? I think it is not worth to disable EPT for L1 to
>>> enable intel PT. what is your opinion?
>> Yes, we can enable it. But since KVM sets IA32_VMX_MISC[14]=0, your patches
>> must forbid enabling
On 23/10/2017 10:01, Kang, Luwei wrote:
>
>>> So, can we enable it in L1
>>> guest only first? I think it is not worth to disable EPT for L1 to
>>> enable intel PT. what is your opinion?
>> Yes, we can enable it. But since KVM sets IA32_VMX_MISC[14]=0, your patches
>> must forbid enabling
> > HI Paolo, Thanks for your clarify. Have understood. So, we should set
> > "use GPA for processor tracing" in any way( if we can do it) even in
> > system mode. There don't have problem in no nested but have problem in
> > nested if not set this bit. Still talking with hardware designer but
>
> > HI Paolo, Thanks for your clarify. Have understood. So, we should set
> > "use GPA for processor tracing" in any way( if we can do it) even in
> > system mode. There don't have problem in no nested but have problem in
> > nested if not set this bit. Still talking with hardware designer but
>
On 20/10/2017 02:22, Kang, Luwei wrote:
> HI Paolo, Thanks for your clarify. Have understood. So, we should set
> "use GPA for processor tracing" in any way( if we can do it) even in
> system mode. There don't have problem in no nested but have problem
> in nested if not set this bit. Still
On 20/10/2017 02:22, Kang, Luwei wrote:
> HI Paolo, Thanks for your clarify. Have understood. So, we should set
> "use GPA for processor tracing" in any way( if we can do it) even in
> system mode. There don't have problem in no nested but have problem
> in nested if not set this bit. Still
> On 19/10/2017 07:54, Kang, Luwei wrote:
> >>> Get it. I have feedback to hardware architect. I hope it can be applied
> >>> but it may need wait a long time.
> >> Note that the hardware need not do anything. However it would be
> >> nice if the SDM can define a bit _for the hypervisors_ to
> On 19/10/2017 07:54, Kang, Luwei wrote:
> >>> Get it. I have feedback to hardware architect. I hope it can be applied
> >>> but it may need wait a long time.
> >> Note that the hardware need not do anything. However it would be
> >> nice if the SDM can define a bit _for the hypervisors_ to
On 19/10/2017 07:54, Kang, Luwei wrote:
>>> Get it. I have feedback to hardware architect. I hope it can be applied but
>>> it may need wait a long time.
>> Note that the hardware need not do anything. However it would be nice if
>> the SDM can define a bit _for the hypervisors_ to
>> enforce
On 19/10/2017 07:54, Kang, Luwei wrote:
>>> Get it. I have feedback to hardware architect. I hope it can be applied but
>>> it may need wait a long time.
>> Note that the hardware need not do anything. However it would be nice if
>> the SDM can define a bit _for the hypervisors_ to
>> enforce
> Nested virtualization is interesting. We would like the nested
> hypervisor to be forced to set the "use GPA for processor tracing"
> secondary execution control whenever "enable EPT" is set and
> RTIT_CTL is nonzero. There is no way to encode that in
>
> Nested virtualization is interesting. We would like the nested
> hypervisor to be forced to set the "use GPA for processor tracing"
> secondary execution control whenever "enable EPT" is set and
> RTIT_CTL is nonzero. There is no way to encode that in
>
Please send patch series with git's sendemail.thread=shallow and
sendemail.chainReplyTo=false settings (see the man git-send-email
--thread option for an explanation of the different settings).
That way email clients treat the entire series as a single email thread.
Patch management and
Please send patch series with git's sendemail.thread=shallow and
sendemail.chainReplyTo=false settings (see the man git-send-email
--thread option for an explanation of the different settings).
That way email clients treat the entire series as a single email thread.
Patch management and
On 18/10/2017 13:06, Kang, Luwei wrote:
Nested virtualization is interesting. We would like the nested
hypervisor to be forced to set the "use GPA for processor tracing"
secondary execution control whenever "enable EPT" is set and RTIT_CTL
is nonzero. There is no way to
On 18/10/2017 13:06, Kang, Luwei wrote:
Nested virtualization is interesting. We would like the nested
hypervisor to be forced to set the "use GPA for processor tracing"
secondary execution control whenever "enable EPT" is set and RTIT_CTL
is nonzero. There is no way to
> >> Nested virtualization is interesting. We would like the nested
> >> hypervisor to be forced to set the "use GPA for processor tracing"
> >> secondary execution control whenever "enable EPT" is set and RTIT_CTL
> >> is nonzero. There is no way to encode that in
> >> IA32_VMX_PROCBASED_CTLS2,
> >> Nested virtualization is interesting. We would like the nested
> >> hypervisor to be forced to set the "use GPA for processor tracing"
> >> secondary execution control whenever "enable EPT" is set and RTIT_CTL
> >> is nonzero. There is no way to encode that in
> >> IA32_VMX_PROCBASED_CTLS2,
On 18/10/2017 12:18, Kang, Luwei wrote:
>> Nested virtualization is interesting. We would like the nested
>> hypervisor to be forced to set the "use GPA for processor tracing"
>> secondary execution control whenever "enable EPT" is set and
>> RTIT_CTL is nonzero. There is no way to encode that
On 18/10/2017 12:18, Kang, Luwei wrote:
>> Nested virtualization is interesting. We would like the nested
>> hypervisor to be forced to set the "use GPA for processor tracing"
>> secondary execution control whenever "enable EPT" is set and
>> RTIT_CTL is nonzero. There is no way to encode that
> On 16/10/2017 14:09, Luwei Kang wrote:
> > 2. Enabling use of EPT to redirect PT output.
> > — This enables the VMM to elect to virtualize the PT output buffer using
> > EPT. In this mode, the CPU will treat PT output
> addresses as Guest Physical Addresses (GPAs) and translate them using
> On 16/10/2017 14:09, Luwei Kang wrote:
> > 2. Enabling use of EPT to redirect PT output.
> > — This enables the VMM to elect to virtualize the PT output buffer using
> > EPT. In this mode, the CPU will treat PT output
> addresses as Guest Physical Addresses (GPAs) and translate them using
On 16/10/2017 14:09, Luwei Kang wrote:
> 2. Enabling use of EPT to redirect PT output.
> — This enables the VMM to elect to virtualize the PT output buffer using
> EPT. In this mode, the CPU will treat PT output addresses as Guest Physical
> Addresses (GPAs) and translate them using EPT. This
On 16/10/2017 14:09, Luwei Kang wrote:
> 2. Enabling use of EPT to redirect PT output.
> — This enables the VMM to elect to virtualize the PT output buffer using
> EPT. In this mode, the CPU will treat PT output addresses as Guest Physical
> Addresses (GPAs) and translate them using EPT. This
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