> Subject: Re: [PATCH 3/3] PCI/portdrv: Add support for sharing xilinx
> controller irq with AER
>
> On Wed, Aug 01, 2018 at 11:05:09AM -0700, Sinan Kaya wrote:
> > On 8/1/2018 9:44 AM, Bharat Kumar Gogada wrote:
> > > Xilinx ZynqMP PS PCIe does not report AE
On 8/6/2018 4:56 PM, Bjorn Helgaas wrote:
I remember seeing a similar patch before.
Are you thinking of [1]?
yup.
On Wed, Aug 01, 2018 at 11:05:09AM -0700, Sinan Kaya wrote:
> On 8/1/2018 9:44 AM, Bharat Kumar Gogada wrote:
> > Xilinx ZynqMP PS PCIe does not report AER interrupts using Advanced
> > Error Interrupt Message Number. The controller has dedicated interrupt line
> > for reporting PCIe errors along w
On 8/1/2018 9:44 AM, Bharat Kumar Gogada wrote:
Xilinx ZynqMP PS PCIe does not report AER interrupts using Advanced
Error Interrupt Message Number. The controller has dedicated interrupt line
for reporting PCIe errors along with AER.
Using dedicated controller irq number for AER which is shared
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