;
> lorenzo.pieral...@arm.com; Mark Rutland; Brian Starkey; o...@lixom.net;
> b...@kernel.crashing.org; linux-kernel@vger.kernel.org; linux-
> a...@vger.kernel.org; Linuxarm; linux-...@vger.kernel.org; Corey
> Minyard; John Garry; xuwei (O)
> Subject: Re: [PATCH v10 0/9] LPC: legacy IS
On Fri, Oct 27, 2017 at 10:11 AM, Gabriele Paoloni
wrote:
> From: gabriele paoloni
>
> This patchset supports the IPMI-bt device attached to the Low-Pin-Count
> interface implemented on Hisilicon Hip06/Hip07 SoC.
fwiw, I tested this on one of our D05 boards and verified that the
IPMI SI worked f
Hi David
[...]
> FWIW my thoughts on this are WTF!
>
> Looks to me horribly over complicated and over generalised.
>
> Surely is it could be done the same way that x86 does IO cycles?
No
> So you encode the information into the 'address' the driver passes
> to ioread16() (etc) to allow it to
From: Gabriele Paoloni
> Sent: 27 October 2017 17:11
> This patchset supports the IPMI-bt device attached to the Low-Pin-Count
> interface implemented on Hisilicon Hip06/Hip07 SoC.
> ---
> | LPC host|
> | |
>
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