;
> Yu, Ong Hock <ong.hock...@intel.com>; Luck, Tony <tony.l...@intel.com>;
> Wan Mohamad, Wan Ahmad Zainie <wan.ahmad.zainie.wan.moha...@intel.com>;
> Sun, Yunying <yunying....@intel.com>
> Subject: Re: [PATCH v11 1/6] drivers/platform/x86/p2sb: New Primary
Wan Ahmad Zainie ;
> Sun, Yunying
> Subject: Re: [PATCH v11 1/6] drivers/platform/x86/p2sb: New Primary to
> Sideband bridge support driver for Intel SOC's
>
> On Fri, 2016-11-18 at 13:22 +0800, Tan Jui Nee wrote:
> > From: Andy Shevchenko
> >
> > There is already
On Fri, 2016-11-18 at 13:22 +0800, Tan Jui Nee wrote:
> From: Andy Shevchenko
>
> There is already one and at least one more user coming which
> require an access to Primary to Sideband bridge (P2SB) in order
> to get IO or MMIO bar hidden by BIOS.
> Create a
On Fri, 2016-11-18 at 13:22 +0800, Tan Jui Nee wrote:
> From: Andy Shevchenko
>
> There is already one and at least one more user coming which
> require an access to Primary to Sideband bridge (P2SB) in order
> to get IO or MMIO bar hidden by BIOS.
> Create a driver to access P2SB for x86
On Fri, Nov 18, 2016 at 01:22:25PM +0800, Tan Jui Nee wrote:
> From: Andy Shevchenko
>
> There is already one and at least one more user coming which
> require an access to Primary to Sideband bridge (P2SB) in order
> to get IO or MMIO bar hidden by BIOS.
>
On Fri, Nov 18, 2016 at 01:22:25PM +0800, Tan Jui Nee wrote:
> From: Andy Shevchenko
>
> There is already one and at least one more user coming which
> require an access to Primary to Sideband bridge (P2SB) in order
> to get IO or MMIO bar hidden by BIOS.
> Create a driver to access P2SB for x86
6 matches
Mail list logo