On Fri, Mar 23, 2018 at 12:19:20AM +, Ghannam, Yazen wrote:
> Is it alright if I go ahead and just send the v3 of this set without the MCA
> decoding?
Sure, but let's not drop the MCA decoding from the todo list. :)
Thx.
--
Regards/Gruss,
Boris.
SUSE Linux GmbH, GF: Felix Imendörffer,
> -Original Message-
> From: Borislav Petkov
> Sent: Thursday, March 1, 2018 7:00 AM
> To: Ghannam, Yazen
> Cc: Tony Luck ; linux-...@vger.kernel.org; linux-
> ker...@vger.kernel.org; ard.biesheu...@linaro.org; x...@kernel.org
> Subject: Re: [PATCH v2 0/8] Decode
> One much more important thing I forgot about yesterday: how is
> this thing playing into our RAS reporting, x86 decoding chain, etc
> infrastructure?
>
> Is CPER bypassing it completely and the firmware is doing everything
> now? I sure hope not.
Intel gives OEMs lots of options to catch and twe
On Wed, Feb 28, 2018 at 08:58:15PM +, Ghannam, Yazen wrote:
> 1) We keep this set mostly as-is. This would be our fallback if we don't have
> anything better.
Yes, sounds good. We try to decode it as MCE and if we cannot, we dump
the raw CPER record.
> 2) I add the MCA decoding to this set. I
> -Original Message-
> From: Borislav Petkov [mailto:b...@suse.de]
> Sent: Wednesday, February 28, 2018 11:36 AM
> To: Ghannam, Yazen
> Cc: Tony Luck ; linux-...@vger.kernel.org; linux-
> ker...@vger.kernel.org; ard.biesheu...@linaro.org; x...@kernel.org
> Subje
On Wed, Feb 28, 2018 at 03:12:09PM +, Ghannam, Yazen wrote:
> CPER is the format used for BERT, etc. We'll only ever see a CPER if the
> firmware creates it. And it's up to firmware policy what is shared with
> the OS.
Yap, but we should still tie it into our infra.
> My main reason for print
> -Original Message-
> From: Borislav Petkov [mailto:b...@suse.de]
> Sent: Wednesday, February 28, 2018 3:43 AM
> To: Ghannam, Yazen ; Tony Luck
>
> Cc: linux-...@vger.kernel.org; linux-kernel@vger.kernel.org;
> ard.biesheu...@linaro.org; x...@kernel.org
> Su
On Mon, Feb 26, 2018 at 01:38:56PM -0600, Yazen Ghannam wrote:
> From: Yazen Ghannam
>
> This series adds decoding for the IA32/X64 Common Platform Error Record.
One much more important thing I forgot about yesterday: how is
this thing playing into our RAS reporting, x86 decoding chain, etc
infr
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