ents.
I will fix the patch as you pointed out.
Best Regards
> -Original Message-
> From: John Garry
> Sent: Friday, January 22, 2021 2:44 AM
> To: Shaokun Zhang ; Nakamura, Shunsuke/中村
> 俊介
> Cc: mathieu.poir...@linaro.org; linux-kernel@vger.kernel.org;
> leo....@linaro.org; w...@ke
On 21/01/2021 11:39, Shaokun Zhang wrote:
Hi,
在 2021/1/21 18:54, Shunsuke Nakamura 写道:
Adds L1 data cache refill prefetch, L2 data cache refill prefetch,
and DCZVA instruction events.
A silly question, Does Arm define these events? I checked Arm ARM
document(DDI0487Fc) that these event
Hi,
在 2021/1/21 18:54, Shunsuke Nakamura 写道:
> Adds L1 data cache refill prefetch, L2 data cache refill prefetch,
> and DCZVA instruction events.
A silly question, Does Arm define these events? I checked Arm ARM
document(DDI0487Fc) that these event numbers are reserved. Or maybe
I miss
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