On Wed, 30 May 2018 12:53:53 +0100
Jean-Philippe Brucker wrote:
> On 30/05/18 04:45, Tian, Kevin wrote:
> >> On SMMUv3 the minimum alignment for base_ptr is 64 bytes, so
> >> a
> guest
> >> under a vSMMU might pass a pointer that's not aligned on 4k.
> >>
> > PASID
> From: Alex Williamson [mailto:alex.william...@redhat.com]
> Sent: Wednesday, May 30, 2018 11:18 AM
>
> On Wed, 30 May 2018 01:41:43 +
> "Tian, Kevin" wrote:
>
> > > From: Alex Williamson [mailto:alex.william...@redhat.com]
> > > Sent: Wednesday, May 30, 2018 4:09 AM
> > >
> > > On Fri, 20
On Wed, 30 May 2018 01:41:43 +
"Tian, Kevin" wrote:
> > From: Alex Williamson [mailto:alex.william...@redhat.com]
> > Sent: Wednesday, May 30, 2018 4:09 AM
> >
> > On Fri, 20 Apr 2018 16:42:51 -0700
> > Jacob Pan wrote:
> >
> > > On Fri, 20 Apr 2018 19:25:34 +0100
> > > Jean-Philippe Bru
On Fri, 20 Apr 2018 19:25:34 +0100
Jean-Philippe Brucker wrote:
> On Tue, Apr 17, 2018 at 08:10:47PM +0100, Alex Williamson wrote:
> [...]
> > > + /* Assign guest PASID table pointer and size order */
> > > + ctx_lo = (pasidt_binfo->base_ptr & VTD_PAGE_MASK) |
> > > + (pasidt_binfo->pasid
On Tue, 17 Apr 2018 13:10:47 -0600
Alex Williamson wrote:
> On Mon, 16 Apr 2018 14:48:53 -0700
> Jacob Pan wrote:
>
> > Add Intel VT-d ops to the generic iommu_bind_pasid_table API
> > functions.
> >
> > The primary use case is for direct assignment of SVM capable
> > device. Originated from e
On Tue, Apr 17, 2018 at 08:10:47PM +0100, Alex Williamson wrote:
[...]
> > + /* Assign guest PASID table pointer and size order */
> > + ctx_lo = (pasidt_binfo->base_ptr & VTD_PAGE_MASK) |
> > + (pasidt_binfo->pasid_bits - MIN_NR_PASID_BITS);
>
> Where does this IOMMU API interface d
On Mon, 16 Apr 2018 14:48:53 -0700
Jacob Pan wrote:
> Add Intel VT-d ops to the generic iommu_bind_pasid_table API
> functions.
>
> The primary use case is for direct assignment of SVM capable
> device. Originated from emulated IOMMU in the guest, the request goes
> through many layers (e.g. VF
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