Kernel Mailing List ker...@vger.kernel.org>; devicetree ; open
> list:GPIO SUBSYSTEM ; git ;
> saikrishna12...@gmail.com
> Subject: Re: [PATCH v4 3/3] pinctrl: Add Xilinx ZynqMP pinctrl driver support
>
> On Mon, Mar 22, 2021 at 4:25 PM Sai Krishna Potthuri
> wrote:
> >
On Mon, Mar 22, 2021 at 4:25 PM Sai Krishna Potthuri
wrote:
> [Andy]
> > > > > + PIN_CONFIG_IOSTANDARD = PIN_CONFIG_END + 1, };
> > > >
> > > > I'm lost here. What is IO standard exactly? Why it can't be in
> > > > generic headers?
> > > It represents LVCMOS 3.3 volts/ LVCMOS 1.8 volts.
> >
On 3/24/21 10:13 AM, Greg Kroah-Hartman wrote:
> On Wed, Mar 24, 2021 at 10:02:53AM +0100, Michal Simek wrote:
>>
>>
>> On 3/24/21 9:49 AM, Greg Kroah-Hartman wrote:
>>> On Wed, Mar 24, 2021 at 09:29:12AM +0100, Michal Simek wrote:
On 3/23/21 2:42 PM, Greg Kroah-Hartman wrote:
> On Wed,
On Wed, Mar 24, 2021 at 10:02:53AM +0100, Michal Simek wrote:
>
>
> On 3/24/21 9:49 AM, Greg Kroah-Hartman wrote:
> > On Wed, Mar 24, 2021 at 09:29:12AM +0100, Michal Simek wrote:
> >> On 3/23/21 2:42 PM, Greg Kroah-Hartman wrote:
> >>> On Wed, Mar 17, 2021 at 01:55:16PM +0530, Sai Krishna Potthu
On 3/24/21 9:49 AM, Greg Kroah-Hartman wrote:
> On Wed, Mar 24, 2021 at 09:29:12AM +0100, Michal Simek wrote:
>> On 3/23/21 2:42 PM, Greg Kroah-Hartman wrote:
>>> On Wed, Mar 17, 2021 at 01:55:16PM +0530, Sai Krishna Potthuri wrote:
Adding pinctrl driver for Xilinx ZynqMP platform.
Thi
On Wed, Mar 24, 2021 at 09:29:12AM +0100, Michal Simek wrote:
> On 3/23/21 2:42 PM, Greg Kroah-Hartman wrote:
> > On Wed, Mar 17, 2021 at 01:55:16PM +0530, Sai Krishna Potthuri wrote:
> >> Adding pinctrl driver for Xilinx ZynqMP platform.
> >> This driver queries pin information from firmware and r
On 3/23/21 2:42 PM, Greg Kroah-Hartman wrote:
> On Wed, Mar 17, 2021 at 01:55:16PM +0530, Sai Krishna Potthuri wrote:
>> Adding pinctrl driver for Xilinx ZynqMP platform.
>> This driver queries pin information from firmware and registers
>> pin control accordingly.
>>
>> Signed-off-by: Sai Krishna
On Wed, Mar 17, 2021 at 01:55:16PM +0530, Sai Krishna Potthuri wrote:
> Adding pinctrl driver for Xilinx ZynqMP platform.
> This driver queries pin information from firmware and registers
> pin control accordingly.
>
> Signed-off-by: Sai Krishna Potthuri
> ---
> drivers/pinctrl/Kconfig
inux Kernel Mailing List ker...@vger.kernel.org>; devicetree ; open
> list:GPIO SUBSYSTEM ; git ;
> saikrishna12...@gmail.com
> Subject: Re: [PATCH v4 3/3] pinctrl: Add Xilinx ZynqMP pinctrl driver support
>
> On Mon, Mar 22, 2021 at 5:25 PM Sai Krishna Potthuri
> wrote:
&g
On Mon, Mar 22, 2021 at 5:25 PM Sai Krishna Potthuri
wrote:
> > From: Andy Shevchenko
> > Sent: Friday, March 19, 2021 3:53 PM
> > On Thu, Mar 18, 2021 at 4:42 PM Sai Krishna Potthuri
> > wrote:
> > > > From: Andy Shevchenko
> > > > Sent: Wednesday, March 17, 2021 6:26 PM On Wed, Mar 17, 2021 a
inux Kernel Mailing List ker...@vger.kernel.org>; devicetree ; open
> list:GPIO SUBSYSTEM ; git ;
> saikrishna12...@gmail.com
> Subject: Re: [PATCH v4 3/3] pinctrl: Add Xilinx ZynqMP pinctrl driver support
>
> On Thu, Mar 18, 2021 at 4:42 PM Sai Krishna Potthuri
> wrote:
>
On Thu, Mar 18, 2021 at 4:42 PM Sai Krishna Potthuri
wrote:
> > From: Andy Shevchenko
> > Sent: Wednesday, March 17, 2021 6:26 PM
> > On Wed, Mar 17, 2021 at 10:27 AM Sai Krishna Potthuri
> > wrote:
...
> > > +config PINCTRL_ZYNQMP
> > > + bool "Pinctrl driver for Xilinx ZynqMP"
> >
> >
.@lists.infradead.org>; Linux Kernel Mailing List ker...@vger.kernel.org>; devicetree ; open
> list:GPIO SUBSYSTEM ; git ;
> saikrishna12...@gmail.com
> Subject: Re: [PATCH v4 3/3] pinctrl: Add Xilinx ZynqMP pinctrl driver support
>
> On Wed, Mar 17, 2021 at 10:27 AM Sai Krishna
On Wed, Mar 17, 2021 at 10:27 AM Sai Krishna Potthuri
wrote:
>
> Adding pinctrl driver for Xilinx ZynqMP platform.
> This driver queries pin information from firmware and registers
> pin control accordingly.
>
> Signed-off-by: Sai Krishna Potthuri
> ---
> drivers/pinctrl/Kconfig | 13
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