RE: [PATCH v9 04/12] perf/x86/intel/pt: add new capability for Intel PT

> > On Tue, May 22, 2018 at 12:52:07PM +0800, Luwei Kang wrote: > > > CPUID(EAX=14H,ECX=0):EBX[bit 3] = 1 indicates support of output to > > > Trace Transport subsystem. > > > MSR IA32_RTIT_CTL.FabricEn[bit 6] is reserved if CPUID.(EAX=14H, > > > ECX=0):ECX[bit 3] = 0. > > > > This should instead s

RE: [PATCH v9 04/12] perf/x86/intel/pt: add new capability for Intel PT

> > CPUID(EAX=14H,ECX=0):EBX[bit 3] = 1 indicates support of output to > > Trace Transport subsystem. > > MSR IA32_RTIT_CTL.FabricEn[bit 6] is reserved if CPUID.(EAX=14H, > > ECX=0):ECX[bit 3] = 0. > > This should instead say: > > This adds support for "output to Trace Transport subsystem" capabi

Re: [PATCH v9 04/12] perf/x86/intel/pt: add new capability for Intel PT

On Thu, Jun 07, 2018 at 04:40:51PM +0300, Alexander Shishkin wrote: > On Tue, May 22, 2018 at 12:52:07PM +0800, Luwei Kang wrote: > > CPUID(EAX=14H,ECX=0):EBX[bit 3] = 1 indicates support of > > output to Trace Transport subsystem. > > MSR IA32_RTIT_CTL.FabricEn[bit 6] is reserved if > > CPUID.(EAX

Re: [PATCH v9 04/12] perf/x86/intel/pt: add new capability for Intel PT

On Tue, May 22, 2018 at 12:52:07PM +0800, Luwei Kang wrote: > CPUID(EAX=14H,ECX=0):EBX[bit 3] = 1 indicates support of > output to Trace Transport subsystem. > MSR IA32_RTIT_CTL.FabricEn[bit 6] is reserved if > CPUID.(EAX=14H, ECX=0):ECX[bit 3] = 0. This should instead say: This adds support for