RE: [patch 11/16] x86/ldt: Force access bit for CS/SS

2017-12-19 Thread David Laight
From: Andy Lutomirski > Sent: 12 December 2017 19:27 ... > > Why is the iret exception unrecoverable anyway? Does anybody even know? > > > > Weird microcode shit aside, a fault on IRET will return to kernel code with > kernel GS, and then the > next time we enter the kernel we're backwards. We c

Re: [patch 11/16] x86/ldt: Force access bit for CS/SS

2017-12-12 Thread Andy Lutomirski
> On Dec 12, 2017, at 11:05 AM, Linus Torvalds > wrote: > >> On Tue, Dec 12, 2017 at 9:32 AM, Thomas Gleixner wrote: >> >> There is one exception; IRET will immediately load CS/SS and unrecoverably >> #GP. To avoid this issue access the LDT descriptors used by CS/SS before >> the IRET to use

Re: [patch 11/16] x86/ldt: Force access bit for CS/SS

2017-12-12 Thread Linus Torvalds
On Tue, Dec 12, 2017 at 9:32 AM, Thomas Gleixner wrote: > > There is one exception; IRET will immediately load CS/SS and unrecoverably > #GP. To avoid this issue access the LDT descriptors used by CS/SS before > the IRET to userspace. Ok, so the other patch made me nervous, this just makes me go

Re: [patch 11/16] x86/ldt: Force access bit for CS/SS

2017-12-12 Thread Peter Zijlstra
On Tue, Dec 12, 2017 at 07:41:39PM +0100, Thomas Gleixner wrote: > The pages are populated _before_ the new ldt is installed. So no memory > pressure issue, nothing. If the populate fails, then modify_ldt() returns > with an error. Also, these pages are not visible to reclaim. They're not pagecach

Re: [patch 11/16] x86/ldt: Force access bit for CS/SS

2017-12-12 Thread Thomas Gleixner
On Tue, 12 Dec 2017, Peter Zijlstra wrote: > On Tue, Dec 12, 2017 at 10:22:48AM -0800, Andy Lutomirski wrote: > > > > Also, why is LAR deferred to user exit? And I thought that LAR didn't > > set the accessed bit. > > LAR does not set the ACCESSED bit indeed, we need to explicitly set that > wh

Re: [patch 11/16] x86/ldt: Force access bit for CS/SS

2017-12-12 Thread Peter Zijlstra
On Tue, Dec 12, 2017 at 10:22:48AM -0800, Andy Lutomirski wrote: > > Also, why is LAR deferred to user exit? And I thought that LAR didn't > set the accessed bit. LAR does not set the ACCESSED bit indeed, we need to explicitly set that when creating the descriptor. It also works if you do the L

Re: [patch 11/16] x86/ldt: Force access bit for CS/SS

2017-12-12 Thread Andy Lutomirski
> On Dec 12, 2017, at 10:10 AM, Andy Lutomirski wrote: > >> On Tue, Dec 12, 2017 at 10:09 AM, Peter Zijlstra >> wrote: >>> On Tue, Dec 12, 2017 at 10:03:02AM -0800, Andy Lutomirski wrote: >>> On Tue, Dec 12, 2017 at 9:32 AM, Thomas Gleixner wrote: >> @@ -171,6 +172,9 @@ static void exi

Re: [patch 11/16] x86/ldt: Force access bit for CS/SS

2017-12-12 Thread Andy Lutomirski
On Tue, Dec 12, 2017 at 10:09 AM, Peter Zijlstra wrote: > On Tue, Dec 12, 2017 at 10:03:02AM -0800, Andy Lutomirski wrote: >> On Tue, Dec 12, 2017 at 9:32 AM, Thomas Gleixner wrote: > >> > @@ -171,6 +172,9 @@ static void exit_to_usermode_loop(struct >> > /* Disable IRQs and retry

Re: [patch 11/16] x86/ldt: Force access bit for CS/SS

2017-12-12 Thread Peter Zijlstra
On Tue, Dec 12, 2017 at 10:03:02AM -0800, Andy Lutomirski wrote: > On Tue, Dec 12, 2017 at 9:32 AM, Thomas Gleixner wrote: > > @@ -171,6 +172,9 @@ static void exit_to_usermode_loop(struct > > /* Disable IRQs and retry */ > > local_irq_disable(); > > > > +

Re: [patch 11/16] x86/ldt: Force access bit for CS/SS

2017-12-12 Thread Andy Lutomirski
On Tue, Dec 12, 2017 at 9:32 AM, Thomas Gleixner wrote: > From: Peter Zijlstra > > When mapping the LDT RO the hardware will typically generate write faults > on first use. These faults can be trapped and the backing pages can be > modified by the kernel. > > There is one exception; IRET will imm