Re: perf events ring buffer memory barrier on powerpc

2014-05-09 Thread Paul E. McKenney
On Fri, May 09, 2014 at 08:20:25AM -0400, Mikulas Patocka wrote: > > > On Fri, 9 May 2014, Victor Kaplansky wrote: > > > Mikulas Patocka wrote on 05/08/2014 11:46:53 PM: > > > > > > > BTW, it is why you also don't need ACCESS_ONCE() around @tail, but > > > > > only > > > > > around > > > > >

Re: perf events ring buffer memory barrier on powerpc

2014-05-09 Thread Mikulas Patocka
On Fri, 9 May 2014, Victor Kaplansky wrote: > Mikulas Patocka wrote on 05/08/2014 11:46:53 PM: > > > > > BTW, it is why you also don't need ACCESS_ONCE() around @tail, but only > > > > around > > > > @head read. > > > > > > Agreed, the ACCESS_ONCE() around tail is superfluous since we're the

Re: perf events ring buffer memory barrier on powerpc

2014-05-09 Thread Mikulas Patocka
On Fri, 9 May 2014, Victor Kaplansky wrote: Mikulas Patocka mpato...@redhat.com wrote on 05/08/2014 11:46:53 PM: BTW, it is why you also don't need ACCESS_ONCE() around @tail, but only around @head read. Agreed, the ACCESS_ONCE() around tail is superfluous since we're the

Re: perf events ring buffer memory barrier on powerpc

2014-05-09 Thread Paul E. McKenney
On Fri, May 09, 2014 at 08:20:25AM -0400, Mikulas Patocka wrote: On Fri, 9 May 2014, Victor Kaplansky wrote: Mikulas Patocka mpato...@redhat.com wrote on 05/08/2014 11:46:53 PM: BTW, it is why you also don't need ACCESS_ONCE() around @tail, but only around @head

Re: perf events ring buffer memory barrier on powerpc

2014-05-08 Thread Mikulas Patocka
[ I found this in the lkml archvive ] > On Wed, Oct 30, 2013 at 04:52:05PM +0200, Victor Kaplansky wrote: > > > Peter Zijlstra wrote on 10/30/2013 01:25:26 PM: > > > > > Also, I'm not entirely sure on C, that too seems like a dependency, we > > > simply cannot read the buffer @tail before we've

Re: perf events ring buffer memory barrier on powerpc

2014-05-08 Thread Mikulas Patocka
[ I found this in the lkml archvive ] On Wed, Oct 30, 2013 at 04:52:05PM +0200, Victor Kaplansky wrote: Peter Zijlstra pet...@infradead.org wrote on 10/30/2013 01:25:26 PM: Also, I'm not entirely sure on C, that too seems like a dependency, we simply cannot read the buffer @tail

Re: perf events ring buffer memory barrier on powerpc

2013-11-04 Thread Paul E. McKenney
On Mon, Nov 04, 2013 at 09:57:17AM +, Will Deacon wrote: > Hi Paul, > > On Sun, Nov 03, 2013 at 10:47:12PM +, Paul E. McKenney wrote: > > On Sun, Nov 03, 2013 at 05:07:59PM +, Will Deacon wrote: > > > On Sun, Nov 03, 2013 at 02:40:17PM +, Paul E. McKenney wrote: > > > > On Sat,

Re: perf events ring buffer memory barrier on powerpc

2013-11-04 Thread Paul E. McKenney
On Mon, Nov 04, 2013 at 10:07:44AM +0100, Peter Zijlstra wrote: > On Sat, Nov 02, 2013 at 08:20:48AM -0700, Paul E. McKenney wrote: > > On Fri, Nov 01, 2013 at 11:30:17AM +0100, Peter Zijlstra wrote: > > > Furthermore there's a gazillion parallel userspace programs. > > > > Most of which have

Re: perf events ring buffer memory barrier on powerpc

2013-11-04 Thread Will Deacon
Hi Paul, On Sun, Nov 03, 2013 at 10:47:12PM +, Paul E. McKenney wrote: > On Sun, Nov 03, 2013 at 05:07:59PM +, Will Deacon wrote: > > On Sun, Nov 03, 2013 at 02:40:17PM +, Paul E. McKenney wrote: > > > On Sat, Nov 02, 2013 at 10:32:39AM -0700, Paul E. McKenney wrote: > > > > On Fri,

Re: perf events ring buffer memory barrier on powerpc

2013-11-04 Thread Peter Zijlstra
On Sat, Nov 02, 2013 at 08:20:48AM -0700, Paul E. McKenney wrote: > On Fri, Nov 01, 2013 at 11:30:17AM +0100, Peter Zijlstra wrote: > > Furthermore there's a gazillion parallel userspace programs. > > Most of which have very unaggressive concurrency designs. pthread_mutex_t A, B; char

Re: perf events ring buffer memory barrier on powerpc

2013-11-04 Thread Peter Zijlstra
On Sat, Nov 02, 2013 at 08:20:48AM -0700, Paul E. McKenney wrote: On Fri, Nov 01, 2013 at 11:30:17AM +0100, Peter Zijlstra wrote: Furthermore there's a gazillion parallel userspace programs. Most of which have very unaggressive concurrency designs. pthread_mutex_t A, B; char data_A[x]; int

Re: perf events ring buffer memory barrier on powerpc

2013-11-04 Thread Will Deacon
Hi Paul, On Sun, Nov 03, 2013 at 10:47:12PM +, Paul E. McKenney wrote: On Sun, Nov 03, 2013 at 05:07:59PM +, Will Deacon wrote: On Sun, Nov 03, 2013 at 02:40:17PM +, Paul E. McKenney wrote: On Sat, Nov 02, 2013 at 10:32:39AM -0700, Paul E. McKenney wrote: On Fri, Nov 01,

Re: perf events ring buffer memory barrier on powerpc

2013-11-04 Thread Paul E. McKenney
On Mon, Nov 04, 2013 at 10:07:44AM +0100, Peter Zijlstra wrote: On Sat, Nov 02, 2013 at 08:20:48AM -0700, Paul E. McKenney wrote: On Fri, Nov 01, 2013 at 11:30:17AM +0100, Peter Zijlstra wrote: Furthermore there's a gazillion parallel userspace programs. Most of which have very

Re: perf events ring buffer memory barrier on powerpc

2013-11-04 Thread Paul E. McKenney
On Mon, Nov 04, 2013 at 09:57:17AM +, Will Deacon wrote: Hi Paul, On Sun, Nov 03, 2013 at 10:47:12PM +, Paul E. McKenney wrote: On Sun, Nov 03, 2013 at 05:07:59PM +, Will Deacon wrote: On Sun, Nov 03, 2013 at 02:40:17PM +, Paul E. McKenney wrote: On Sat, Nov 02, 2013

Re: perf events ring buffer memory barrier on powerpc

2013-11-03 Thread Paul E. McKenney
On Sun, Nov 03, 2013 at 05:07:59PM +, Will Deacon wrote: > On Sun, Nov 03, 2013 at 02:40:17PM +, Paul E. McKenney wrote: > > On Sat, Nov 02, 2013 at 10:32:39AM -0700, Paul E. McKenney wrote: > > > On Fri, Nov 01, 2013 at 03:56:34PM +0100, Peter Zijlstra wrote: > > > > On Wed, Oct 30, 2013

Re: perf events ring buffer memory barrier on powerpc

2013-11-03 Thread Benjamin Herrenschmidt
On Fri, 2013-11-01 at 18:30 +0200, Victor Kaplansky wrote: > "David Laight" wrote on 11/01/2013 06:25:29 PM: > > gcc will do unexpected memory accesses for bit fields that are > > adjacent to volatile data. > > In particular it may generate 64bit sized (and aligned) RMW cycles > > when accessing

Re: perf events ring buffer memory barrier on powerpc

2013-11-03 Thread Will Deacon
On Sun, Nov 03, 2013 at 02:40:17PM +, Paul E. McKenney wrote: > On Sat, Nov 02, 2013 at 10:32:39AM -0700, Paul E. McKenney wrote: > > On Fri, Nov 01, 2013 at 03:56:34PM +0100, Peter Zijlstra wrote: > > > On Wed, Oct 30, 2013 at 11:40:15PM -0700, Paul E. McKenney wrote: > > > > > Now the whole

Re: perf events ring buffer memory barrier on powerpc

2013-11-03 Thread Paul E. McKenney
On Sat, Nov 02, 2013 at 10:32:39AM -0700, Paul E. McKenney wrote: > On Fri, Nov 01, 2013 at 03:56:34PM +0100, Peter Zijlstra wrote: > > On Wed, Oct 30, 2013 at 11:40:15PM -0700, Paul E. McKenney wrote: > > > > Now the whole crux of the question is if we need barrier A at all, since > > > > the

Re: perf events ring buffer memory barrier on powerpc

2013-11-03 Thread Paul E. McKenney
On Sat, Nov 02, 2013 at 10:32:39AM -0700, Paul E. McKenney wrote: On Fri, Nov 01, 2013 at 03:56:34PM +0100, Peter Zijlstra wrote: On Wed, Oct 30, 2013 at 11:40:15PM -0700, Paul E. McKenney wrote: Now the whole crux of the question is if we need barrier A at all, since the STORES issued

Re: perf events ring buffer memory barrier on powerpc

2013-11-03 Thread Will Deacon
On Sun, Nov 03, 2013 at 02:40:17PM +, Paul E. McKenney wrote: On Sat, Nov 02, 2013 at 10:32:39AM -0700, Paul E. McKenney wrote: On Fri, Nov 01, 2013 at 03:56:34PM +0100, Peter Zijlstra wrote: On Wed, Oct 30, 2013 at 11:40:15PM -0700, Paul E. McKenney wrote: Now the whole crux of the

Re: perf events ring buffer memory barrier on powerpc

2013-11-03 Thread Benjamin Herrenschmidt
On Fri, 2013-11-01 at 18:30 +0200, Victor Kaplansky wrote: David Laight david.lai...@aculab.com wrote on 11/01/2013 06:25:29 PM: gcc will do unexpected memory accesses for bit fields that are adjacent to volatile data. In particular it may generate 64bit sized (and aligned) RMW cycles

Re: perf events ring buffer memory barrier on powerpc

2013-11-03 Thread Paul E. McKenney
On Sun, Nov 03, 2013 at 05:07:59PM +, Will Deacon wrote: On Sun, Nov 03, 2013 at 02:40:17PM +, Paul E. McKenney wrote: On Sat, Nov 02, 2013 at 10:32:39AM -0700, Paul E. McKenney wrote: On Fri, Nov 01, 2013 at 03:56:34PM +0100, Peter Zijlstra wrote: On Wed, Oct 30, 2013 at

Re: perf events ring buffer memory barrier on powerpc

2013-11-02 Thread Paul E. McKenney
On Fri, Nov 01, 2013 at 06:06:58PM +0200, Victor Kaplansky wrote: > "Paul E. McKenney" wrote on 10/31/2013 > 05:25:43 PM: > > > I really don't care about "fair" -- I care instead about the kernel > > working reliably. > > Though I don't see how putting a memory barrier without deep

Re: perf events ring buffer memory barrier on powerpc

2013-11-02 Thread Paul E. McKenney
On Fri, Nov 01, 2013 at 03:56:34PM +0100, Peter Zijlstra wrote: > On Wed, Oct 30, 2013 at 11:40:15PM -0700, Paul E. McKenney wrote: > > > Now the whole crux of the question is if we need barrier A at all, since > > > the STORES issued by the @buf writes are dependent on the ubuf->tail > > > read.

Re: perf events ring buffer memory barrier on powerpc

2013-11-02 Thread Paul E. McKenney
On Fri, Nov 01, 2013 at 03:12:58PM +0200, Victor Kaplansky wrote: > "Paul E. McKenney" wrote on 10/31/2013 > 08:16:02 AM: > > > > BTW, it is why you also don't need ACCESS_ONCE() around @tail, but only > > > around > > > @head read. > > Just to be sure, that we are talking about the same code -

Re: perf events ring buffer memory barrier on powerpc

2013-11-02 Thread Paul E. McKenney
[ Adding David Howells, Lech Fomicki, and Mark Batty on CC for their thoughts given previous discussions. ] On Sat, Nov 02, 2013 at 09:36:18AM -0700, Paul E. McKenney wrote: > On Fri, Nov 01, 2013 at 03:12:58PM +0200, Victor Kaplansky wrote: > > "Paul E. McKenney" wrote on 10/31/2013 > >

Re: perf events ring buffer memory barrier on powerpc

2013-11-02 Thread Paul E. McKenney
On Fri, Nov 01, 2013 at 11:30:17AM +0100, Peter Zijlstra wrote: > On Fri, Nov 01, 2013 at 02:28:14AM -0700, Paul E. McKenney wrote: > > > This is a completely untenable position. > > > > Indeed it is! > > > > C/C++ never was intended to be used for parallel programming, > > And yet pretty much

Re: perf events ring buffer memory barrier on powerpc

2013-11-02 Thread Paul E. McKenney
On Fri, Nov 01, 2013 at 05:11:29PM +0100, Peter Zijlstra wrote: > On Wed, Oct 30, 2013 at 11:40:15PM -0700, Paul E. McKenney wrote: > > > void kbuf_write(int sz, void *buf) > > > { > > > u64 tail = ACCESS_ONCE(ubuf->tail); /* last location userspace read */ > > > u64 offset = kbuf->head; /* we

Re: perf events ring buffer memory barrier on powerpc

2013-11-02 Thread Paul E. McKenney
On Fri, Nov 01, 2013 at 04:25:42PM +0200, Victor Kaplansky wrote: > "Paul E. McKenney" wrote on 10/31/2013 > 08:40:15 AM: > > > > void ubuf_read(void) > > > { > > >u64 head, tail; > > > > > >tail = ACCESS_ONCE(ubuf->tail); > > >head = ACCESS_ONCE(ubuf->head); > > > > > >/* > > >

Re: perf events ring buffer memory barrier on powerpc

2013-11-02 Thread Paul E. McKenney
On Fri, Nov 01, 2013 at 05:18:19PM +0100, Peter Zijlstra wrote: > On Wed, Oct 30, 2013 at 11:40:15PM -0700, Paul E. McKenney wrote: > > The dependency you are talking about is via the "if" statement? > > Even C/C++11 is not required to respect control dependencies. > > > > This one is a bit

Re: perf events ring buffer memory barrier on powerpc

2013-11-02 Thread Paul E. McKenney
On Fri, Nov 01, 2013 at 05:11:29PM +0100, Peter Zijlstra wrote: On Wed, Oct 30, 2013 at 11:40:15PM -0700, Paul E. McKenney wrote: void kbuf_write(int sz, void *buf) { u64 tail = ACCESS_ONCE(ubuf-tail); /* last location userspace read */ u64 offset = kbuf-head; /* we already know

Re: perf events ring buffer memory barrier on powerpc

2013-11-02 Thread Paul E. McKenney
On Fri, Nov 01, 2013 at 04:25:42PM +0200, Victor Kaplansky wrote: Paul E. McKenney paul...@linux.vnet.ibm.com wrote on 10/31/2013 08:40:15 AM: void ubuf_read(void) { u64 head, tail; tail = ACCESS_ONCE(ubuf-tail); head = ACCESS_ONCE(ubuf-head); /* *

Re: perf events ring buffer memory barrier on powerpc

2013-11-02 Thread Paul E. McKenney
On Fri, Nov 01, 2013 at 05:18:19PM +0100, Peter Zijlstra wrote: On Wed, Oct 30, 2013 at 11:40:15PM -0700, Paul E. McKenney wrote: The dependency you are talking about is via the if statement? Even C/C++11 is not required to respect control dependencies. This one is a bit annoying. The

Re: perf events ring buffer memory barrier on powerpc

2013-11-02 Thread Paul E. McKenney
[ Adding David Howells, Lech Fomicki, and Mark Batty on CC for their thoughts given previous discussions. ] On Sat, Nov 02, 2013 at 09:36:18AM -0700, Paul E. McKenney wrote: On Fri, Nov 01, 2013 at 03:12:58PM +0200, Victor Kaplansky wrote: Paul E. McKenney paul...@linux.vnet.ibm.com wrote on

Re: perf events ring buffer memory barrier on powerpc

2013-11-02 Thread Paul E. McKenney
On Fri, Nov 01, 2013 at 11:30:17AM +0100, Peter Zijlstra wrote: On Fri, Nov 01, 2013 at 02:28:14AM -0700, Paul E. McKenney wrote: This is a completely untenable position. Indeed it is! C/C++ never was intended to be used for parallel programming, And yet pretty much all kernels

Re: perf events ring buffer memory barrier on powerpc

2013-11-02 Thread Paul E. McKenney
On Fri, Nov 01, 2013 at 03:56:34PM +0100, Peter Zijlstra wrote: On Wed, Oct 30, 2013 at 11:40:15PM -0700, Paul E. McKenney wrote: Now the whole crux of the question is if we need barrier A at all, since the STORES issued by the @buf writes are dependent on the ubuf-tail read. The

Re: perf events ring buffer memory barrier on powerpc

2013-11-02 Thread Paul E. McKenney
On Fri, Nov 01, 2013 at 03:12:58PM +0200, Victor Kaplansky wrote: Paul E. McKenney paul...@linux.vnet.ibm.com wrote on 10/31/2013 08:16:02 AM: BTW, it is why you also don't need ACCESS_ONCE() around @tail, but only around @head read. Just to be sure, that we are talking about the

Re: perf events ring buffer memory barrier on powerpc

2013-11-02 Thread Paul E. McKenney
On Fri, Nov 01, 2013 at 06:06:58PM +0200, Victor Kaplansky wrote: Paul E. McKenney paul...@linux.vnet.ibm.com wrote on 10/31/2013 05:25:43 PM: I really don't care about fair -- I care instead about the kernel working reliably. Though I don't see how putting a memory barrier without deep

RE: perf events ring buffer memory barrier on powerpc

2013-11-01 Thread Victor Kaplansky
"David Laight" wrote on 11/01/2013 06:25:29 PM: > gcc will do unexpected memory accesses for bit fields that are > adjacent to volatile data. > In particular it may generate 64bit sized (and aligned) RMW cycles > when accessing bit fields. > And yes, this has caused real problems. Thanks, I am

RE: perf events ring buffer memory barrier on powerpc

2013-11-01 Thread David Laight
> But "broken" compiler is much wider issue to be deeply discussed in this > thread. I'm pretty sure that kernel have tons of very subtle > code that actually creates locks and memory ordering. Such code > usually just use the "barrier()" approach to tell gcc not to combine > or move memory

Re: perf events ring buffer memory barrier on powerpc

2013-11-01 Thread Peter Zijlstra
On Wed, Oct 30, 2013 at 11:40:15PM -0700, Paul E. McKenney wrote: > The dependency you are talking about is via the "if" statement? > Even C/C++11 is not required to respect control dependencies. > > This one is a bit annoying. The x86 TSO means that you really only > need barrier(), ARM (recent

Re: perf events ring buffer memory barrier on powerpc

2013-11-01 Thread Peter Zijlstra
On Wed, Oct 30, 2013 at 11:40:15PM -0700, Paul E. McKenney wrote: > > void kbuf_write(int sz, void *buf) > > { > > u64 tail = ACCESS_ONCE(ubuf->tail); /* last location userspace read */ > > u64 offset = kbuf->head; /* we already know where we last wrote */ > > u64 head = offset + sz; >

Re: perf events ring buffer memory barrier on powerpc

2013-11-01 Thread Victor Kaplansky
"Paul E. McKenney" wrote on 10/31/2013 05:25:43 PM: > I really don't care about "fair" -- I care instead about the kernel > working reliably. Though I don't see how putting a memory barrier without deep understanding why it is needed helps kernel reliability, I do agree that reliability is more

Re: perf events ring buffer memory barrier on powerpc

2013-11-01 Thread Peter Zijlstra
On Wed, Oct 30, 2013 at 11:40:15PM -0700, Paul E. McKenney wrote: > > Now the whole crux of the question is if we need barrier A at all, since > > the STORES issued by the @buf writes are dependent on the ubuf->tail > > read. > > The dependency you are talking about is via the "if" statement? >

Re: perf events ring buffer memory barrier on powerpc

2013-11-01 Thread Victor Kaplansky
"Paul E. McKenney" wrote on 10/31/2013 08:40:15 AM: > > void ubuf_read(void) > > { > >u64 head, tail; > > > >tail = ACCESS_ONCE(ubuf->tail); > >head = ACCESS_ONCE(ubuf->head); > > > >/* > > * Ensure we read the buffer boundaries before the actual buffer > > * data... > >

Re: perf events ring buffer memory barrier on powerpc

2013-11-01 Thread Victor Kaplansky
"Paul E. McKenney" wrote on 10/31/2013 08:16:02 AM: > > BTW, it is why you also don't need ACCESS_ONCE() around @tail, but only > > around > > @head read. Just to be sure, that we are talking about the same code - I was considering ACCESS_ONCE() around @tail in point AAA in the following

Re: perf events ring buffer memory barrier on powerpc

2013-11-01 Thread Paul E. McKenney
On Thu, Oct 31, 2013 at 11:59:21AM +0200, Victor Kaplansky wrote: > "Paul E. McKenney" wrote on 10/31/2013 > 06:32:58 AM: > > > If you want to play the "omit memory barriers" game, then proving a > > negative is in fact the task before you. > > Generally it is not fair. Otherwise, anyone could

Re: perf events ring buffer memory barrier on powerpc

2013-11-01 Thread Paul E. McKenney
On Wed, Oct 30, 2013 at 04:52:05PM +0200, Victor Kaplansky wrote: > Peter Zijlstra wrote on 10/30/2013 01:25:26 PM: > > > Also, I'm not entirely sure on C, that too seems like a dependency, we > > simply cannot read the buffer @tail before we've read the tail itself, > > now can we? Similarly we

Re: perf events ring buffer memory barrier on powerpc

2013-11-01 Thread Paul E. McKenney
On Wed, Oct 30, 2013 at 12:25:26PM +0100, Peter Zijlstra wrote: > On Wed, Oct 30, 2013 at 02:27:25AM -0700, Paul E. McKenney wrote: > > On Mon, Oct 28, 2013 at 10:58:58PM +0200, Victor Kaplansky wrote: > > > Oleg Nesterov wrote on 10/28/2013 10:17:35 PM: > > > > > > > mb(); // :

Re: perf events ring buffer memory barrier on powerpc

2013-11-01 Thread Peter Zijlstra
On Fri, Nov 01, 2013 at 02:28:14AM -0700, Paul E. McKenney wrote: > > This is a completely untenable position. > > Indeed it is! > > C/C++ never was intended to be used for parallel programming, And yet pretty much all kernels ever written for SMP systems are written in it; what drugs are

Re: perf events ring buffer memory barrier on powerpc

2013-11-01 Thread Paul E. McKenney
On Thu, Oct 31, 2013 at 04:19:55PM +0100, Peter Zijlstra wrote: > On Thu, Oct 31, 2013 at 08:07:56AM -0700, Paul E. McKenney wrote: > > On Thu, Oct 31, 2013 at 10:04:57AM +0100, Peter Zijlstra wrote: > > > On Wed, Oct 30, 2013 at 09:32:58PM -0700, Paul E. McKenney wrote: > > > > Before C/C++11,

Re: perf events ring buffer memory barrier on powerpc

2013-11-01 Thread Paul E. McKenney
On Thu, Oct 31, 2013 at 04:19:55PM +0100, Peter Zijlstra wrote: On Thu, Oct 31, 2013 at 08:07:56AM -0700, Paul E. McKenney wrote: On Thu, Oct 31, 2013 at 10:04:57AM +0100, Peter Zijlstra wrote: On Wed, Oct 30, 2013 at 09:32:58PM -0700, Paul E. McKenney wrote: Before C/C++11, the closest

Re: perf events ring buffer memory barrier on powerpc

2013-11-01 Thread Peter Zijlstra
On Fri, Nov 01, 2013 at 02:28:14AM -0700, Paul E. McKenney wrote: This is a completely untenable position. Indeed it is! C/C++ never was intended to be used for parallel programming, And yet pretty much all kernels ever written for SMP systems are written in it; what drugs are those

Re: perf events ring buffer memory barrier on powerpc

2013-11-01 Thread Paul E. McKenney
On Thu, Oct 31, 2013 at 11:59:21AM +0200, Victor Kaplansky wrote: Paul E. McKenney paul...@linux.vnet.ibm.com wrote on 10/31/2013 06:32:58 AM: If you want to play the omit memory barriers game, then proving a negative is in fact the task before you. Generally it is not fair. Otherwise,

Re: perf events ring buffer memory barrier on powerpc

2013-11-01 Thread Paul E. McKenney
On Wed, Oct 30, 2013 at 12:25:26PM +0100, Peter Zijlstra wrote: On Wed, Oct 30, 2013 at 02:27:25AM -0700, Paul E. McKenney wrote: On Mon, Oct 28, 2013 at 10:58:58PM +0200, Victor Kaplansky wrote: Oleg Nesterov o...@redhat.com wrote on 10/28/2013 10:17:35 PM: mb(); //

Re: perf events ring buffer memory barrier on powerpc

2013-11-01 Thread Paul E. McKenney
On Wed, Oct 30, 2013 at 04:52:05PM +0200, Victor Kaplansky wrote: Peter Zijlstra pet...@infradead.org wrote on 10/30/2013 01:25:26 PM: Also, I'm not entirely sure on C, that too seems like a dependency, we simply cannot read the buffer @tail before we've read the tail itself, now can we?

Re: perf events ring buffer memory barrier on powerpc

2013-11-01 Thread Victor Kaplansky
Paul E. McKenney paul...@linux.vnet.ibm.com wrote on 10/31/2013 08:16:02 AM: BTW, it is why you also don't need ACCESS_ONCE() around @tail, but only around @head read. Just to be sure, that we are talking about the same code - I was considering ACCESS_ONCE() around @tail in point AAA in

Re: perf events ring buffer memory barrier on powerpc

2013-11-01 Thread Victor Kaplansky
Paul E. McKenney paul...@linux.vnet.ibm.com wrote on 10/31/2013 08:40:15 AM: void ubuf_read(void) { u64 head, tail; tail = ACCESS_ONCE(ubuf-tail); head = ACCESS_ONCE(ubuf-head); /* * Ensure we read the buffer boundaries before the actual buffer * data...

Re: perf events ring buffer memory barrier on powerpc

2013-11-01 Thread Peter Zijlstra
On Wed, Oct 30, 2013 at 11:40:15PM -0700, Paul E. McKenney wrote: Now the whole crux of the question is if we need barrier A at all, since the STORES issued by the @buf writes are dependent on the ubuf-tail read. The dependency you are talking about is via the if statement? Even C/C++11

Re: perf events ring buffer memory barrier on powerpc

2013-11-01 Thread Victor Kaplansky
Paul E. McKenney paul...@linux.vnet.ibm.com wrote on 10/31/2013 05:25:43 PM: I really don't care about fair -- I care instead about the kernel working reliably. Though I don't see how putting a memory barrier without deep understanding why it is needed helps kernel reliability, I do agree that

Re: perf events ring buffer memory barrier on powerpc

2013-11-01 Thread Peter Zijlstra
On Wed, Oct 30, 2013 at 11:40:15PM -0700, Paul E. McKenney wrote: void kbuf_write(int sz, void *buf) { u64 tail = ACCESS_ONCE(ubuf-tail); /* last location userspace read */ u64 offset = kbuf-head; /* we already know where we last wrote */ u64 head = offset + sz; if

Re: perf events ring buffer memory barrier on powerpc

2013-11-01 Thread Peter Zijlstra
On Wed, Oct 30, 2013 at 11:40:15PM -0700, Paul E. McKenney wrote: The dependency you are talking about is via the if statement? Even C/C++11 is not required to respect control dependencies. This one is a bit annoying. The x86 TSO means that you really only need barrier(), ARM (recent ARM,

RE: perf events ring buffer memory barrier on powerpc

2013-11-01 Thread David Laight
But broken compiler is much wider issue to be deeply discussed in this thread. I'm pretty sure that kernel have tons of very subtle code that actually creates locks and memory ordering. Such code usually just use the barrier() approach to tell gcc not to combine or move memory accesses

RE: perf events ring buffer memory barrier on powerpc

2013-11-01 Thread Victor Kaplansky
David Laight david.lai...@aculab.com wrote on 11/01/2013 06:25:29 PM: gcc will do unexpected memory accesses for bit fields that are adjacent to volatile data. In particular it may generate 64bit sized (and aligned) RMW cycles when accessing bit fields. And yes, this has caused real problems.

Re: perf events ring buffer memory barrier on powerpc

2013-10-31 Thread Peter Zijlstra
On Thu, Oct 31, 2013 at 08:07:56AM -0700, Paul E. McKenney wrote: > On Thu, Oct 31, 2013 at 10:04:57AM +0100, Peter Zijlstra wrote: > > On Wed, Oct 30, 2013 at 09:32:58PM -0700, Paul E. McKenney wrote: > > > Before C/C++11, the closest thing to such a prohibition is use of > > > volatile, for

Re: perf events ring buffer memory barrier on powerpc

2013-10-31 Thread Paul E. McKenney
On Thu, Oct 31, 2013 at 10:04:57AM +0100, Peter Zijlstra wrote: > On Wed, Oct 30, 2013 at 09:32:58PM -0700, Paul E. McKenney wrote: > > Before C/C++11, the closest thing to such a prohibition is use of > > volatile, for example, ACCESS_ONCE(). Even in C/C++11, you have to > > use atomics to get

RE: perf events ring buffer memory barrier on powerpc

2013-10-31 Thread Victor Kaplansky
"David Laight" wrote on 10/31/2013 02:28:56 PM: > So even though the wmb() in the writer ensures the writes are correctly > ordered, the reader can read the old value from the second location from > its local cache. In case of circular buffer, the only thing that producer reads is @tail, and

RE: perf events ring buffer memory barrier on powerpc

2013-10-31 Thread David Laight
> "For instance, your producer must issue a "memory barrier" instruction > after writing the data to shared memory and before inserting it on > the queue; likewise, your consumer must issue a memory barrier > instruction after removing an item from the queue and before reading > from its

Re: perf events ring buffer memory barrier on powerpc

2013-10-31 Thread Victor Kaplansky
"Paul E. McKenney" wrote on 10/31/2013 06:32:58 AM: > If you want to play the "omit memory barriers" game, then proving a > negative is in fact the task before you. Generally it is not fair. Otherwise, anyone could put an smp_mb() at a random place, and expect others to "prove" that it is not

Re: perf events ring buffer memory barrier on powerpc

2013-10-31 Thread Peter Zijlstra
On Wed, Oct 30, 2013 at 09:32:58PM -0700, Paul E. McKenney wrote: > Before C/C++11, the closest thing to such a prohibition is use of > volatile, for example, ACCESS_ONCE(). Even in C/C++11, you have to > use atomics to get anything resembing this prohibition. > > If you just use normal

Re: perf events ring buffer memory barrier on powerpc

2013-10-31 Thread Peter Zijlstra
On Wed, Oct 30, 2013 at 09:32:58PM -0700, Paul E. McKenney wrote: Before C/C++11, the closest thing to such a prohibition is use of volatile, for example, ACCESS_ONCE(). Even in C/C++11, you have to use atomics to get anything resembing this prohibition. If you just use normal variables,

Re: perf events ring buffer memory barrier on powerpc

2013-10-31 Thread Victor Kaplansky
Paul E. McKenney paul...@linux.vnet.ibm.com wrote on 10/31/2013 06:32:58 AM: If you want to play the omit memory barriers game, then proving a negative is in fact the task before you. Generally it is not fair. Otherwise, anyone could put an smp_mb() at a random place, and expect others to

RE: perf events ring buffer memory barrier on powerpc

2013-10-31 Thread David Laight
For instance, your producer must issue a memory barrier instruction after writing the data to shared memory and before inserting it on the queue; likewise, your consumer must issue a memory barrier instruction after removing an item from the queue and before reading from its memory.

RE: perf events ring buffer memory barrier on powerpc

2013-10-31 Thread Victor Kaplansky
David Laight david.lai...@aculab.com wrote on 10/31/2013 02:28:56 PM: So even though the wmb() in the writer ensures the writes are correctly ordered, the reader can read the old value from the second location from its local cache. In case of circular buffer, the only thing that producer

Re: perf events ring buffer memory barrier on powerpc

2013-10-31 Thread Paul E. McKenney
On Thu, Oct 31, 2013 at 10:04:57AM +0100, Peter Zijlstra wrote: On Wed, Oct 30, 2013 at 09:32:58PM -0700, Paul E. McKenney wrote: Before C/C++11, the closest thing to such a prohibition is use of volatile, for example, ACCESS_ONCE(). Even in C/C++11, you have to use atomics to get anything

Re: perf events ring buffer memory barrier on powerpc

2013-10-31 Thread Peter Zijlstra
On Thu, Oct 31, 2013 at 08:07:56AM -0700, Paul E. McKenney wrote: On Thu, Oct 31, 2013 at 10:04:57AM +0100, Peter Zijlstra wrote: On Wed, Oct 30, 2013 at 09:32:58PM -0700, Paul E. McKenney wrote: Before C/C++11, the closest thing to such a prohibition is use of volatile, for example,

Re: perf events ring buffer memory barrier on powerpc

2013-10-30 Thread Paul E. McKenney
On Wed, Oct 30, 2013 at 03:28:54PM +0200, Victor Kaplansky wrote: > "Paul E. McKenney" wrote on 10/30/2013 > 11:27:25 AM: > > > If you were to back up that insistence with a description of the > orderings > > you are relying on, why other orderings are not important, and how the > > important

Re: perf events ring buffer memory barrier on powerpc

2013-10-30 Thread Paul E. McKenney
On Wed, Oct 30, 2013 at 04:51:16PM +0100, Peter Zijlstra wrote: > On Wed, Oct 30, 2013 at 03:28:54PM +0200, Victor Kaplansky wrote: > > one of the authors of Documentation/memory-barriers.txt is on cc: list ;-) > > > > Disclaimer: it is anyway impossible to prove lack of *any* problem. > > > >

Re: perf events ring buffer memory barrier on powerpc

2013-10-30 Thread Peter Zijlstra
On Wed, Oct 30, 2013 at 07:29:30PM +0100, Peter Zijlstra wrote: > + page_shift = PAGE_SHIFT + page_order(rb); > + > + handle->page = (offset >> page_shift) & (rb->nr_pages - 1); > + > + offset &= page_shift - 1; offset &= (1UL << page_shift) - 1; Weird that it even appeared to work..

Re: perf events ring buffer memory barrier on powerpc

2013-10-30 Thread Peter Zijlstra
On Wed, Oct 30, 2013 at 04:51:16PM +0100, Peter Zijlstra wrote: > On Wed, Oct 30, 2013 at 03:28:54PM +0200, Victor Kaplansky wrote: > > one of the authors of Documentation/memory-barriers.txt is on cc: list ;-) > > > > Disclaimer: it is anyway impossible to prove lack of *any* problem. > > > >

Re: perf events ring buffer memory barrier on powerpc

2013-10-30 Thread Peter Zijlstra
On Wed, Oct 30, 2013 at 07:14:29PM +0200, Victor Kaplansky wrote: > We need a complete rmb() here IMO. I think there is a fundamental > difference between load and stores in this aspect. Load are allowed to > be hoisted by compiler or executed speculatively by HW. To prevent > load "*(ubuf->data +

Re: perf events ring buffer memory barrier on powerpc

2013-10-30 Thread Victor Kaplansky
Peter Zijlstra wrote on 10/30/2013 05:39:31 PM: > Although I suppose speculative reads are allowed -- they don't have the > destructive behaviour speculative writes have -- and thus we could in > fact get reorder issues. I agree. > > But since it is still a dependent load in that we do that

Re: perf events ring buffer memory barrier on powerpc

2013-10-30 Thread Peter Zijlstra
On Wed, Oct 30, 2013 at 03:28:54PM +0200, Victor Kaplansky wrote: > one of the authors of Documentation/memory-barriers.txt is on cc: list ;-) > > Disclaimer: it is anyway impossible to prove lack of *any* problem. > > Having said that, lets look into an example in >

Re: perf events ring buffer memory barrier on powerpc

2013-10-30 Thread Peter Zijlstra
On Wed, Oct 30, 2013 at 04:52:05PM +0200, Victor Kaplansky wrote: > Peter Zijlstra wrote on 10/30/2013 01:25:26 PM: > > > Also, I'm not entirely sure on C, that too seems like a dependency, we > > simply cannot read the buffer @tail before we've read the tail itself, > > now can we? Similarly we

Re: perf events ring buffer memory barrier on powerpc

2013-10-30 Thread Victor Kaplansky
Peter Zijlstra wrote on 10/30/2013 01:25:26 PM: > Also, I'm not entirely sure on C, that too seems like a dependency, we > simply cannot read the buffer @tail before we've read the tail itself, > now can we? Similarly we cannot compare tail to head without having the > head read completed. No,

Re: perf events ring buffer memory barrier on powerpc

2013-10-30 Thread Victor Kaplansky
"Paul E. McKenney" wrote on 10/30/2013 11:27:25 AM: > If you were to back up that insistence with a description of the orderings > you are relying on, why other orderings are not important, and how the > important orderings are enforced, I might be tempted to pay attention > to your opinion. > >

Re: perf events ring buffer memory barrier on powerpc

2013-10-30 Thread Peter Zijlstra
On Wed, Oct 30, 2013 at 11:48:44AM +, James Hogan wrote: > Hi Peter, > > On 30/10/13 10:42, Peter Zijlstra wrote: > > Subject: perf, tool: Add required memory barriers > > > > To match patch bf378d341e48 ("perf: Fix perf ring buffer memory > > ordering") change userspace to also adhere to

Re: perf events ring buffer memory barrier on powerpc

2013-10-30 Thread James Hogan
Hi Peter, On 30/10/13 10:42, Peter Zijlstra wrote: > Subject: perf, tool: Add required memory barriers > > To match patch bf378d341e48 ("perf: Fix perf ring buffer memory > ordering") change userspace to also adhere to the ordering outlined. > > Most barrier implementations were gleaned from >

Re: perf events ring buffer memory barrier on powerpc

2013-10-30 Thread Peter Zijlstra
On Wed, Oct 30, 2013 at 02:27:25AM -0700, Paul E. McKenney wrote: > On Mon, Oct 28, 2013 at 10:58:58PM +0200, Victor Kaplansky wrote: > > Oleg Nesterov wrote on 10/28/2013 10:17:35 PM: > > > > > mb(); // : do we really need it? I think yes. > > > > Oh, it is hard to argue with

Re: perf events ring buffer memory barrier on powerpc

2013-10-30 Thread Peter Zijlstra
On Tue, Oct 29, 2013 at 03:27:05PM -0400, Vince Weaver wrote: > On Tue, 29 Oct 2013, Peter Zijlstra wrote: > > > On Tue, Oct 29, 2013 at 11:21:31AM +0100, Peter Zijlstra wrote: > > --- linux-2.6.orig/include/uapi/linux/perf_event.h > > +++ linux-2.6/include/uapi/linux/perf_event.h > > @@ -479,13

Re: perf events ring buffer memory barrier on powerpc

2013-10-30 Thread Paul E. McKenney
On Mon, Oct 28, 2013 at 10:58:58PM +0200, Victor Kaplansky wrote: > Oleg Nesterov wrote on 10/28/2013 10:17:35 PM: > > > mb(); // : do we really need it? I think yes. > > Oh, it is hard to argue with feelings. Also, it is easy to be on > conservative side and put the barrier

Re: perf events ring buffer memory barrier on powerpc

2013-10-30 Thread Paul E. McKenney
On Mon, Oct 28, 2013 at 10:58:58PM +0200, Victor Kaplansky wrote: Oleg Nesterov o...@redhat.com wrote on 10/28/2013 10:17:35 PM: mb(); // : do we really need it? I think yes. Oh, it is hard to argue with feelings. Also, it is easy to be on conservative side and put the

Re: perf events ring buffer memory barrier on powerpc

2013-10-30 Thread Peter Zijlstra
On Tue, Oct 29, 2013 at 03:27:05PM -0400, Vince Weaver wrote: On Tue, 29 Oct 2013, Peter Zijlstra wrote: On Tue, Oct 29, 2013 at 11:21:31AM +0100, Peter Zijlstra wrote: --- linux-2.6.orig/include/uapi/linux/perf_event.h +++ linux-2.6/include/uapi/linux/perf_event.h @@ -479,13 +479,15 @@

Re: perf events ring buffer memory barrier on powerpc

2013-10-30 Thread Peter Zijlstra
On Wed, Oct 30, 2013 at 02:27:25AM -0700, Paul E. McKenney wrote: On Mon, Oct 28, 2013 at 10:58:58PM +0200, Victor Kaplansky wrote: Oleg Nesterov o...@redhat.com wrote on 10/28/2013 10:17:35 PM: mb(); // : do we really need it? I think yes. Oh, it is hard to argue

Re: perf events ring buffer memory barrier on powerpc

2013-10-30 Thread James Hogan
Hi Peter, On 30/10/13 10:42, Peter Zijlstra wrote: Subject: perf, tool: Add required memory barriers To match patch bf378d341e48 (perf: Fix perf ring buffer memory ordering) change userspace to also adhere to the ordering outlined. Most barrier implementations were gleaned from

Re: perf events ring buffer memory barrier on powerpc

2013-10-30 Thread Peter Zijlstra
On Wed, Oct 30, 2013 at 11:48:44AM +, James Hogan wrote: Hi Peter, On 30/10/13 10:42, Peter Zijlstra wrote: Subject: perf, tool: Add required memory barriers To match patch bf378d341e48 (perf: Fix perf ring buffer memory ordering) change userspace to also adhere to the ordering

Re: perf events ring buffer memory barrier on powerpc

2013-10-30 Thread Victor Kaplansky
Paul E. McKenney paul...@linux.vnet.ibm.com wrote on 10/30/2013 11:27:25 AM: If you were to back up that insistence with a description of the orderings you are relying on, why other orderings are not important, and how the important orderings are enforced, I might be tempted to pay attention

Re: perf events ring buffer memory barrier on powerpc

2013-10-30 Thread Victor Kaplansky
Peter Zijlstra pet...@infradead.org wrote on 10/30/2013 01:25:26 PM: Also, I'm not entirely sure on C, that too seems like a dependency, we simply cannot read the buffer @tail before we've read the tail itself, now can we? Similarly we cannot compare tail to head without having the head read

Re: perf events ring buffer memory barrier on powerpc

2013-10-30 Thread Peter Zijlstra
On Wed, Oct 30, 2013 at 04:52:05PM +0200, Victor Kaplansky wrote: Peter Zijlstra pet...@infradead.org wrote on 10/30/2013 01:25:26 PM: Also, I'm not entirely sure on C, that too seems like a dependency, we simply cannot read the buffer @tail before we've read the tail itself, now can we?

Re: perf events ring buffer memory barrier on powerpc

2013-10-30 Thread Peter Zijlstra
On Wed, Oct 30, 2013 at 03:28:54PM +0200, Victor Kaplansky wrote: one of the authors of Documentation/memory-barriers.txt is on cc: list ;-) Disclaimer: it is anyway impossible to prove lack of *any* problem. Having said that, lets look into an example in

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