Re: x86 TSC time warp puzzle

2005-04-04 Thread Joe Korty
On Mon, Apr 04, 2005 at 09:59:22AM +0100, [EMAIL PROTECTED] wrote: > Jonathan Lundell wrote: > >Well, not actually a time warp, though it feels like one. > > > >I'm doing some real-time bit-twiddling in a driver, using the TSC to > >measure out delays on the order of hundreds of nanoseconds.

Re: x86 TSC time warp puzzle

2005-04-04 Thread P
Jonathan Lundell wrote: Well, not actually a time warp, though it feels like one. I'm doing some real-time bit-twiddling in a driver, using the TSC to measure out delays on the order of hundreds of nanoseconds. Because I want an upper limit on the delay, I disable interrupts around it. The

Re: x86 TSC time warp puzzle

2005-04-04 Thread P
Jonathan Lundell wrote: Well, not actually a time warp, though it feels like one. I'm doing some real-time bit-twiddling in a driver, using the TSC to measure out delays on the order of hundreds of nanoseconds. Because I want an upper limit on the delay, I disable interrupts around it. The

Re: x86 TSC time warp puzzle

2005-04-04 Thread Joe Korty
On Mon, Apr 04, 2005 at 09:59:22AM +0100, [EMAIL PROTECTED] wrote: Jonathan Lundell wrote: Well, not actually a time warp, though it feels like one. I'm doing some real-time bit-twiddling in a driver, using the TSC to measure out delays on the order of hundreds of nanoseconds. Because I

RE: x86 TSC time warp puzzle

2005-04-02 Thread Jonathan Lundell
At 3:13 AM -0500 4/2/05, Lee Revell wrote: On Fri, 2005-04-01 at 23:05 -0800, Pallipadi, Venkatesh wrote: It can be SMI happening in the platform. Typically BIOS uses some SMI > polling to handle some devices during early boot. Though 500 microseconds > sounds a bit too high. Nope, that sounds

RE: x86 TSC time warp puzzle

2005-04-02 Thread Lee Revell
On Fri, 2005-04-01 at 23:05 -0800, Pallipadi, Venkatesh wrote: > It can be SMI happening in the platform. Typically BIOS uses some SMI > polling > to handle some devices during early boot. Though 500 microseconds sounds > a > bit too high. > Nope, that sounds just about right. Buggy BIOSes

RE: x86 TSC time warp puzzle

2005-04-02 Thread Lee Revell
On Fri, 2005-04-01 at 23:05 -0800, Pallipadi, Venkatesh wrote: It can be SMI happening in the platform. Typically BIOS uses some SMI polling to handle some devices during early boot. Though 500 microseconds sounds a bit too high. Nope, that sounds just about right. Buggy BIOSes that

RE: x86 TSC time warp puzzle

2005-04-02 Thread Jonathan Lundell
At 3:13 AM -0500 4/2/05, Lee Revell wrote: On Fri, 2005-04-01 at 23:05 -0800, Pallipadi, Venkatesh wrote: It can be SMI happening in the platform. Typically BIOS uses some SMI polling to handle some devices during early boot. Though 500 microseconds sounds a bit too high. Nope, that sounds

RE: x86 TSC time warp puzzle

2005-04-01 Thread Pallipadi, Venkatesh
At what point are you seeing these delays? During early boot or after boot? It can be SMI happening in the platform. Typically BIOS uses some SMI polling to handle some devices during early boot. Though 500 microseconds sounds a bit too high. Thanks, Venki >-Original Message- >From:

RE: x86 TSC time warp puzzle

2005-04-01 Thread Pallipadi, Venkatesh
At what point are you seeing these delays? During early boot or after boot? It can be SMI happening in the platform. Typically BIOS uses some SMI polling to handle some devices during early boot. Though 500 microseconds sounds a bit too high. Thanks, Venki -Original Message- From: