Hi Andrew,
On Sat, Sep 26, 2020 at 4:45 PM Andrew Lunn wrote:
>
> > I checked this again for the vendor u-boot (where Ethernet is NOT
> > working) as well as the Android kernel which this board was shipped
> > with (where Ethernet is working)
> > - in u-boot the MAC side adds a 2ns TX delay and t
> I checked this again for the vendor u-boot (where Ethernet is NOT
> working) as well as the Android kernel which this board was shipped
> with (where Ethernet is working)
> - in u-boot the MAC side adds a 2ns TX delay and the PHY side adds a
> 2ns RX delay
So that suggest there is nothing on the
Hi Andrew,
On Sat, Sep 26, 2020 at 2:41 AM Andrew Lunn wrote:
>
> > The reference code I linked tries to detect the RGMII interface mode.
> > However, for each board we know the phy-mode as well as the RX and TX
> > delay - so I'm not trying to port the RGMII interface detection part
> > to the m
> The reference code I linked tries to detect the RGMII interface mode.
> However, for each board we know the phy-mode as well as the RX and TX
> delay - so I'm not trying to port the RGMII interface detection part
> to the mainline driver.
>
> on X96 Air (which I'm using for testing) Amlogic conf
On Sat, Sep 26, 2020 at 12:15:59AM +0200, Martin Blumenstingl wrote:
> I do not need the auto-detection of the phy-mode nor any RX/TX delay
> (these are fixed values)
> however, from that patch-set I would need most of
> phy_rgmii_probe_interface() (and all of the helpers it's using)
So if it's no
Hi Andrew,
On Sat, Sep 26, 2020 at 12:14 AM Andrew Lunn wrote:
>
> On Fri, Sep 25, 2020 at 11:47:18PM +0200, Martin Blumenstingl wrote:
> > Hello,
> >
> > Amlogic's 12nm SoC generation requires some RGMII timing calibration
> > within the Ethernet controller glue registers.
> > This calibration i
Hi Vladimir,
On Sat, Sep 26, 2020 at 12:03 AM Vladimir Oltean wrote:
[...]
> > Any recommendations/suggestions/ideas/hints are welcome!
> > Thank you and best regards,
> > Martin
> >
> >
> > [0]
> > https://github.com/khadas/u-boot/blob/4752efbb90b7d048a81760c67f8c826f14baf41c/drivers/net/design
On Fri, Sep 25, 2020 at 11:47:18PM +0200, Martin Blumenstingl wrote:
> Hello,
>
> Amlogic's 12nm SoC generation requires some RGMII timing calibration
> within the Ethernet controller glue registers.
> This calibration is only needed for the RGMII modes, not for the
> (internal) RMII PHY.
> With "
Hi Martin,
On Fri, Sep 25, 2020 at 11:47:18PM +0200, Martin Blumenstingl wrote:
> Hello,
>
> Amlogic's 12nm SoC generation requires some RGMII timing calibration
> within the Ethernet controller glue registers.
> This calibration is only needed for the RGMII modes, not for the
> (internal) RMII PH
Hello,
Amlogic's 12nm SoC generation requires some RGMII timing calibration
within the Ethernet controller glue registers.
This calibration is only needed for the RGMII modes, not for the
(internal) RMII PHY.
With "incorrect" calibration settings Ethernet speeds up to 100Mbit/s
will still work fin
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