Re: [PATCH] ARM: tegra: Ensure entire dcache is flushed on entering LP0/1

On Thu, Nov 19, 2015 at 02:19:47PM +, Jon Hunter wrote: > Tegra support several low-power (LPx) states, which are: > - LP0: CPU + Core voltage off and DRAM in self-refresh > - LP1: CPU voltage off and DRAM in self-refresh > - LP2: CPU voltage off > > When entering any of the above states the t

Re: [PATCH] ARM: tegra: Ensure entire dcache is flushed on entering LP0/1

Hi Jon, On 11/19/2015 10:19 PM, Jon Hunter wrote: Tegra support several low-power (LPx) states, which are: - LP0: CPU + Core voltage off and DRAM in self-refresh - LP1: CPU voltage off and DRAM in self-refresh - LP2: CPU voltage off When entering any of the above states the tegra_disable_clean_