On Mon, May 25, 2020 at 2:07 PM Drew Fustini wrote:
> On Mon, May 25, 2020 at 11:23:17AM +0200, Linus Walleij wrote:
> > On Thu, May 21, 2020 at 12:02 AM Drew Fustini wrote:
> >
> > > I've posted a v2 which I hope improves the intent of the line names. [0]
> > >
> > > I'm happy to integrate any f
On Mon, May 25, 2020 at 11:23:17AM +0200, Linus Walleij wrote:
> On Thu, May 21, 2020 at 12:02 AM Drew Fustini wrote:
>
> > I've posted a v2 which I hope improves the intent of the line names. [0]
> >
> > I'm happy to integrate any feedback and create a v3 - especially if it
> > is prefered for m
On Thu, May 21, 2020 at 12:02 AM Drew Fustini wrote:
> I've posted a v2 which I hope improves the intent of the line names. [0]
>
> I'm happy to integrate any feedback and create a v3 - especially if it
> is prefered for me to list the specific peripherial signals instead of
> an abstract term li
On Mon, May 18, 2020 at 04:18:43PM +0200, Drew Fustini wrote:
> On Mon, May 18, 2020 at 09:11:07AM +0200, Linus Walleij wrote:
> > On Fri, May 8, 2020 at 6:57 PM Drew Fustini wrote:
> >
> > > Add gpio-line-names properties to the gpio controller nodes.
> > > BeagleBone boards have P8 and P9 heade
On Mon, May 18, 2020 at 03:34:23PM +0300, Felipe Balbi wrote:
> Linus Walleij writes:
>
> > On Mon, May 18, 2020 at 10:18 AM Felipe Balbi wrote:
> >> Linus Walleij writes:
> >> >> gpiochip0 - 32 lines:
> >> >> line 0: "ethernet" unused input active-high
> >> >> line
On Mon, May 18, 2020 at 09:11:07AM +0200, Linus Walleij wrote:
> On Fri, May 8, 2020 at 6:57 PM Drew Fustini wrote:
>
> > Add gpio-line-names properties to the gpio controller nodes.
> > BeagleBone boards have P8 and P9 headers [0] which expose many the
> > AM3358 SoC balls to stacking expansion
Linus Walleij writes:
> On Mon, May 18, 2020 at 10:18 AM Felipe Balbi wrote:
>> Linus Walleij writes:
>> >> gpiochip0 - 32 lines:
>> >> line 0: "ethernet" unused input active-high
>> >> line 1: "ethernet" unused input active-high
>> >
>> > Why are the e
On Mon, May 18, 2020 at 10:18 AM Felipe Balbi wrote:
> Linus Walleij writes:
> >> gpiochip0 - 32 lines:
> >> line 0: "ethernet" unused input active-high
> >> line 1: "ethernet" unused input active-high
> >
> > Why are the ethernet lines not tagged with re
Linus Walleij writes:
>> gpiochip0 - 32 lines:
>> line 0: "ethernet" unused input active-high
>> line 1: "ethernet" unused input active-high
>
> Why are the ethernet lines not tagged with respective signal name
> when right below the SPI lines are explicit
On Fri, May 8, 2020 at 6:57 PM Drew Fustini wrote:
> Add gpio-line-names properties to the gpio controller nodes.
> BeagleBone boards have P8 and P9 headers [0] which expose many the
> AM3358 SoC balls to stacking expansion boards called "capes", or to
> other external connections like jumper wir
Hi,
Adding Linus W to Cc, would be good to get some comments on this.
* Drew Fustini [200508 09:58]:
> Add gpio-line-names properties to the gpio controller nodes.
> BeagleBone boards have P8 and P9 headers [0] which expose many the
> AM3358 SoC balls to stacking expansion boards called "capes",
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