On Tue, Jul 18, 2017 at 02:37:34PM +0200, Peter Zijlstra wrote:
> On Tue, Jul 18, 2017 at 11:29:32AM +0200, Jiri Olsa wrote:
>
> > because we have 2 places using the same callback
> > - PEBS drain for free running counters
> > - LBR save/store
> >
> > both of them called from intel_pmu_sched_
On Tue, Jul 18, 2017 at 02:37:34PM +0200, Peter Zijlstra wrote:
> On Tue, Jul 18, 2017 at 11:29:32AM +0200, Jiri Olsa wrote:
>
> > because we have 2 places using the same callback
> > - PEBS drain for free running counters
> > - LBR save/store
> >
> > both of them called from intel_pmu_sched_
On Tue, Jul 18, 2017 at 11:29:32AM +0200, Jiri Olsa wrote:
> because we have 2 places using the same callback
> - PEBS drain for free running counters
> - LBR save/store
>
> both of them called from intel_pmu_sched_task
>
> so let's say PEBS drain setup the callback for the event,
> but in t
On Tue, Jul 18, 2017 at 11:14:44AM +0200, Peter Zijlstra wrote:
> On Mon, Jul 17, 2017 at 05:01:56PM +0200, Jiri Olsa wrote:
> > The x86 pmu currently uses the sched_task callback for 2 functions:
> > - PEBS drain
> > - save/restore LBR data
> >
> > They are both triggered once the x86 pmu is
On Mon, Jul 17, 2017 at 05:01:56PM +0200, Jiri Olsa wrote:
> The x86 pmu currently uses the sched_task callback for 2 functions:
> - PEBS drain
> - save/restore LBR data
>
> They are both triggered once the x86 pmu is registered with
> perf_sched_cb_inc call (within pmu::add callback), r
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