On Wednesday, April 11, 2018 11:52:44 AM CEST Krzysztof Kozlowski wrote:
> On Wed, Apr 11, 2018 at 10:36 AM, Tomasz Figa wrote:
> > 2018-04-10 17:38 GMT+09:00 Tomasz Figa :
> >> 2018-04-10 16:06 GMT+09:00 Krzysztof Kozlowski :
> >>> On Sun, Apr 8, 2018 at 8:07 PM, Paweł Chmiel
> >>> wrote:
>
On Wed, Apr 11, 2018 at 10:36 AM, Tomasz Figa wrote:
> 2018-04-10 17:38 GMT+09:00 Tomasz Figa :
>> 2018-04-10 16:06 GMT+09:00 Krzysztof Kozlowski :
>>> On Sun, Apr 8, 2018 at 8:07 PM, Paweł Chmiel
>>> wrote:
All banks with GPIO interrupts should be at beginning
of bank array and without
2018-04-10 17:38 GMT+09:00 Tomasz Figa :
> 2018-04-10 16:06 GMT+09:00 Krzysztof Kozlowski :
>> On Sun, Apr 8, 2018 at 8:07 PM, Paweł Chmiel
>> wrote:
>>> All banks with GPIO interrupts should be at beginning
>>> of bank array and without any other types of banks between them.
>>> This order is exp
2018-04-10 16:06 GMT+09:00 Krzysztof Kozlowski :
> On Sun, Apr 8, 2018 at 8:07 PM, Paweł Chmiel
> wrote:
>> All banks with GPIO interrupts should be at beginning
>> of bank array and without any other types of banks between them.
>> This order is expected by exynos_eint_gpio_irq, when doing
>> int
On Sun, Apr 8, 2018 at 8:07 PM, Paweł Chmiel
wrote:
> All banks with GPIO interrupts should be at beginning
> of bank array and without any other types of banks between them.
> This order is expected by exynos_eint_gpio_irq, when doing
> interrupt group to bank translation.
> Otherwise, kernel NUL
Hi Pawel,
2018-04-09 3:07 GMT+09:00 Paweł Chmiel :
> All banks with GPIO interrupts should be at beginning
> of bank array and without any other types of banks between them.
> This order is expected by exynos_eint_gpio_irq, when doing
> interrupt group to bank translation.
> Otherwise, kernel NULL
6 matches
Mail list logo