On 12/10/2013 01:09 AM, Kumar Gala wrote:
>
> On Nov 26, 2013, at 10:27 AM, Grygorii Strashko
> wrote:
>
>> On 11/22/2013 11:04 PM, Kumar Gala wrote:
>>>
>>> On Nov 20, 2013, at 9:46 AM, Ivan Khoronzhuk wrote:
>>>
Add bindings for AEMIF controller drivers/memory/ti-aemif.c
>>>
>>> Bi
On Nov 26, 2013, at 10:27 AM, Grygorii Strashko
wrote:
> On 11/22/2013 11:04 PM, Kumar Gala wrote:
>>
>> On Nov 20, 2013, at 9:46 AM, Ivan Khoronzhuk wrote:
>>
>>> Add bindings for AEMIF controller drivers/memory/ti-aemif.c
>>>
>>
>> Binding shouldn’t normally refer to code.
>>
>> Just sa
Kumar,
On Tuesday 26 November 2013 11:27 AM, Grygorii Strashko wrote:
> On 11/22/2013 11:04 PM, Kumar Gala wrote:
>>
>> On Nov 20, 2013, at 9:46 AM, Ivan Khoronzhuk wrote:
>>
>>> Add bindings for AEMIF controller drivers/memory/ti-aemif.c
>>>
>>
>> Binding shouldn’t normally refer to code.
>>
>>
On 11/29/2013 05:10 PM, Santosh Shilimkar wrote:
On Friday 29 November 2013 10:00 AM, Grygorii Strashko wrote:
Hi Kumar Gala,
On 11/22/2013 11:06 PM, Kumar Gala wrote:
On Nov 20, 2013, at 1:03 PM, ivan.khoronzhuk wrote:
On 11/20/2013 08:21 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
+
On Friday 29 November 2013 10:00 AM, Grygorii Strashko wrote:
> Hi Kumar Gala,
>
> On 11/22/2013 11:06 PM, Kumar Gala wrote:
>>
>> On Nov 20, 2013, at 1:03 PM, ivan.khoronzhuk wrote:
>>
>>> On 11/20/2013 08:21 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> + the chip se
On Friday 29 November 2013 09:56 AM, Grygorii Strashko wrote:
> Hi Jean-Christophe,
>
> On 11/22/2013 08:42 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
>> On 21:03 Wed 20 Nov , ivan.khoronzhuk wrote:
>>> On 11/20/2013 08:21 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> +
Hi Kumar Gala,
On 11/22/2013 11:06 PM, Kumar Gala wrote:
>
> On Nov 20, 2013, at 1:03 PM, ivan.khoronzhuk wrote:
>
>> On 11/20/2013 08:21 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
+ the chip select signal.
+ Minimum value is 1 (0 tre
Hi Jean-Christophe,
On 11/22/2013 08:42 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 21:03 Wed 20 Nov , ivan.khoronzhuk wrote:
>> On 11/20/2013 08:21 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
+ the chip select signal.
+ Minimum
On 11/22/2013 11:06 PM, Kumar Gala wrote:
On Nov 20, 2013, at 1:03 PM, ivan.khoronzhuk wrote:
On 11/20/2013 08:21 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
+ the chip select signal.
+ Minimum value is 1 (0 treated as 1).
+
+- ti,c
On 11/22/2013 11:04 PM, Kumar Gala wrote:
On Nov 20, 2013, at 9:46 AM, Ivan Khoronzhuk wrote:
Add bindings for AEMIF controller drivers/memory/ti-aemif.c
Binding shouldn’t normally refer to code.
Just saying something like:
Adding binging for TI Async External Memory Interface (AEMIF) co
On 11/22/2013 11:04 PM, Kumar Gala wrote:
>
> On Nov 20, 2013, at 9:46 AM, Ivan Khoronzhuk wrote:
>
>> Add bindings for AEMIF controller drivers/memory/ti-aemif.c
>>
>
> Binding shouldn’t normally refer to code.
>
> Just saying something like:
>
> Adding binging for TI Async External Memory I
On Nov 20, 2013, at 1:03 PM, ivan.khoronzhuk wrote:
> On 11/20/2013 08:21 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
>>> + the chip select signal.
>>> + Minimum value is 1 (0 treated as 1).
>>> +
>>> +- ti,cs-wsetup:write setup wid
On Nov 20, 2013, at 9:46 AM, Ivan Khoronzhuk wrote:
> Add bindings for AEMIF controller drivers/memory/ti-aemif.c
>
Binding shouldn’t normally refer to code.
Just saying something like:
Adding binging for TI Async External Memory Interface (AEMIF) controller.
> Signed-off-by: Ivan Khoronzh
On 21:03 Wed 20 Nov , ivan.khoronzhuk wrote:
> On 11/20/2013 08:21 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> >> + the chip select signal.
> >> + Minimum value is 1 (0 treated as 1).
> >> +
> >> +- ti,cs-wsetup: write setup width, n
On 11/20/2013 08:21 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
>> +the chip select signal.
>> +Minimum value is 1 (0 treated as 1).
>> +
>> +- ti,cs-wsetup: write setup width, ns
>> +Time between the be
> + the chip select signal.
> + Minimum value is 1 (0 treated as 1).
> +
> +- ti,cs-wsetup: write setup width, ns
> + Time between the beginning of a memory cycle
> + and the
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