Re: [PATCH 2/5] mmc: sdhci-msm: Fix HW issue with power IRQ handling during reset

2017-08-28 Thread Vijay Viswanath
On 8/24/2017 1:12 PM, Adrian Hunter wrote: On 18/08/17 08:19, Vijay Viswanath wrote: From: Sahitya Tummala There is a rare scenario in HW, where the first clear pulse could be lost when the actual reset and clear/read of status register are happening at the same time. Fix this by retrying up

Re: [PATCH 2/5] mmc: sdhci-msm: Fix HW issue with power IRQ handling during reset

2017-08-24 Thread Adrian Hunter
On 18/08/17 08:19, Vijay Viswanath wrote: > From: Sahitya Tummala > > There is a rare scenario in HW, where the first clear pulse could > be lost when the actual reset and clear/read of status register > are happening at the same time. Fix this by retrying upto 10 times > to ensure the status reg