Re: [PATCH RFC] [INET]: Get cirtical word in first 64bit of cache line

2012-12-02 Thread Eric Dumazet
On Sun, 2012-12-02 at 21:25 +0800, Ling Ma wrote: > Hi Eric, > > Attached benchmark test-cwf.c(cc -o test-cwf test-cwf.c), the result > shows when last level cache(LLC) miss and CPU fetches data from > memory, critical word as first 64bit member in cache line has better > performance(costs 1582903

Re: [PATCH RFC] [INET]: Get cirtical word in first 64bit of cache line

2012-12-02 Thread Ling Ma
Hi Eric, Attached benchmark test-cwf.c(cc -o test-cwf test-cwf.c), the result shows when last level cache(LLC) miss and CPU fetches data from memory, critical word as first 64bit member in cache line has better performance(costs 158290336 cycles ) than other positions(offset 0x10, costs 164100732

Re: [PATCH RFC] [INET]: Get cirtical word in first 64bit of cache line

2012-11-27 Thread Eric Dumazet
On Tue, 2012-11-27 at 21:48 +0800, Ling Ma wrote: > Ling: in the looking-up routine, hash value is the most important key, > if it is matched, the other values have most possibility to be > satisfied, and CFW is limited by memory bandwidth(64bit usually), so > we only move hash value as critical

Re: [PATCH RFC] [INET]: Get cirtical word in first 64bit of cache line

2012-11-27 Thread Ling Ma
> networking patches should be sent to netdev. > > (I understand this patch is more a generic one, but at least CC netdev) Ling: OK, this is my first inet patch, I will send to netdev later. > You give no performance numbers for this change... Ling: after I get machine, I will send out test result

Re: [PATCH RFC] [INET]: Get cirtical word in first 64bit of cache line

2012-11-26 Thread Ben Hutchings
On Sun, 2012-11-25 at 22:44 -0800, Eric Dumazet wrote: > On Mon, 2012-11-26 at 11:29 +0800, ling.ma.prog...@gmail.com wrote: > > From: Ma Ling > > > > In order to reduce memory latency when last level cache miss occurs, > > modern CPUs i.e. x86 and arm introduced Critical Word First(CWF) or > > E

Re: [PATCH RFC] [INET]: Get cirtical word in first 64bit of cache line

2012-11-25 Thread Eric Dumazet
On Mon, 2012-11-26 at 11:29 +0800, ling.ma.prog...@gmail.com wrote: > From: Ma Ling > > In order to reduce memory latency when last level cache miss occurs, > modern CPUs i.e. x86 and arm introduced Critical Word First(CWF) or > Early Restart(ER) to get data ASAP. For CWF if critical word is firs