On Mon, Nov 05 2018 at 22:19 -0700, Stephen Boyd wrote:
Quoting Lina Iyer (2018-11-01 10:16:30)
On Wed, Oct 31 2018 at 18:13 -0600, Stephen Boyd wrote:
>
[...]
Ok. I don't see why we need to limit ourselves here. If a GPIO interrupt
isn't routed through PDC physically why does it matter? It s
Quoting Lina Iyer (2018-11-01 10:16:30)
> On Wed, Oct 31 2018 at 18:13 -0600, Stephen Boyd wrote:
> >
> >Right. Let's scrap the plan to do the wakeup based mask/unmask in both
> >chips. It won't work because of the edge trigger type.
> >
> >The difference I see is that this patch does the irq "forw
On Wed, Oct 31 2018 at 18:13 -0600, Stephen Boyd wrote:
Quoting Lina Iyer (2018-10-31 09:46:50)
On Wed, Oct 31 2018 at 01:05 -0600, Stephen Boyd wrote:
>Hi Lina,
>
>Quoting Lina Iyer (2018-10-10 17:29:58)
>> QCOM SoC's that have Power Domain Controller (PDC) chip in the always-on
>> domain can w
Quoting Lina Iyer (2018-10-31 09:46:50)
> On Wed, Oct 31 2018 at 01:05 -0600, Stephen Boyd wrote:
> >Hi Lina,
> >
> >Quoting Lina Iyer (2018-10-10 17:29:58)
> >> QCOM SoC's that have Power Domain Controller (PDC) chip in the always-on
> >> domain can wakeup the SoC, when interrupts and GPIOs are ro
On Wed, Oct 31 2018 at 01:05 -0600, Stephen Boyd wrote:
Hi Lina,
Quoting Lina Iyer (2018-10-10 17:29:58)
QCOM SoC's that have Power Domain Controller (PDC) chip in the always-on
domain can wakeup the SoC, when interrupts and GPIOs are routed to its
interrupt controller. Only select GPIOs that a
On Wed, Oct 31 2018 at 01:05 -0600, Stephen Boyd wrote:
Hi Lina,
Quoting Lina Iyer (2018-10-10 17:29:58)
QCOM SoC's that have Power Domain Controller (PDC) chip in the always-on
domain can wakeup the SoC, when interrupts and GPIOs are routed to its
interrupt controller. Only select GPIOs that a
Hi Lina,
Quoting Lina Iyer (2018-10-10 17:29:58)
> QCOM SoC's that have Power Domain Controller (PDC) chip in the always-on
> domain can wakeup the SoC, when interrupts and GPIOs are routed to its
> interrupt controller. Only select GPIOs that are deemed wakeup capable
> are routed to specific PDC
On Mon, Oct 22 2018 at 03:27 -0600, Marc Zyngier wrote:
On Fri, 19 Oct 2018 20:47:12 +0100,
Lina Iyer wrote:
On Fri, Oct 19 2018 at 09:53 -0600, Marc Zyngier wrote:
> Hi Lina,
>
> On 19/10/18 16:32, Lina Iyer wrote:
>> Hi folks,
>>
>> On Wed, Oct 10 2018 at 18:30 -0600, Lina Iyer wrote:
[...]
On Fri, 19 Oct 2018 20:47:12 +0100,
Lina Iyer wrote:
>
> On Fri, Oct 19 2018 at 09:53 -0600, Marc Zyngier wrote:
> > Hi Lina,
> >
> > On 19/10/18 16:32, Lina Iyer wrote:
> >> Hi folks,
> >>
> >> On Wed, Oct 10 2018 at 18:30 -0600, Lina Iyer wrote:
>
> [...]
>
> >>> +static irqreturn_t wake_ir
On Fri, Oct 19 2018 at 09:53 -0600, Marc Zyngier wrote:
Hi Lina,
On 19/10/18 16:32, Lina Iyer wrote:
Hi folks,
On Wed, Oct 10 2018 at 18:30 -0600, Lina Iyer wrote:
[...]
+static irqreturn_t wake_irq_gpio_handler(int irq, void *data)
+{
+ struct irq_data *irqd = data;
+ struct i
Hi Lina,
On 19/10/18 16:32, Lina Iyer wrote:
> Hi folks,
>
> On Wed, Oct 10 2018 at 18:30 -0600, Lina Iyer wrote:
>> QCOM SoC's that have Power Domain Controller (PDC) chip in the always-on
>> domain can wakeup the SoC, when interrupts and GPIOs are routed to its
>> interrupt controller. Only sel
Hi folks,
On Wed, Oct 10 2018 at 18:30 -0600, Lina Iyer wrote:
QCOM SoC's that have Power Domain Controller (PDC) chip in the always-on
domain can wakeup the SoC, when interrupts and GPIOs are routed to its
interrupt controller. Only select GPIOs that are deemed wakeup capable
are routed to spec
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