Em Wed, Jul 19, 2017 at 02:28:26PM +, Liang, Kan escreveu:
>
>
> > Em Mon, Jul 03, 2017 at 09:58:32AM +0200, Jiri Olsa escreveu:
> > > On Fri, Jun 30, 2017 at 10:16:56AM -0400, kan.li...@intel.com wrote:
> > > > From: Kan Liang
> > > >
> > > > An earlier kernel patch allowed enabling PT and
> Em Mon, Jul 03, 2017 at 09:58:32AM +0200, Jiri Olsa escreveu:
> > On Fri, Jun 30, 2017 at 10:16:56AM -0400, kan.li...@intel.com wrote:
> > > From: Kan Liang
> > >
> > > An earlier kernel patch allowed enabling PT and LBR at the same time
> > > on Goldmont.
> > >
> > > commit ccbebba4c6bf ("per
Em Mon, Jul 03, 2017 at 09:58:32AM +0200, Jiri Olsa escreveu:
> On Fri, Jun 30, 2017 at 10:16:56AM -0400, kan.li...@intel.com wrote:
> > From: Kan Liang
> >
> > An earlier kernel patch allowed enabling PT and LBR at the same time on
> > Goldmont.
> >
> > commit ccbebba4c6bf ("perf/x86/intel/pt:
On Fri, Jun 30, 2017 at 10:16:56AM -0400, kan.li...@intel.com wrote:
> From: Kan Liang
>
> An earlier kernel patch allowed enabling PT and LBR at the same time on
> Goldmont.
>
> commit ccbebba4c6bf ("perf/x86/intel/pt: Bypass PT vs. LBR exclusivity
> if the core supports it")
>
> However, user
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