Hi Arnd,
On Thursday 26 September 2013 03:21 PM, Arnd Bergmann wrote:
> On Thursday 26 September 2013, Kishon Vijay Abraham I wrote:
>> On Wednesday 25 September 2013 02:53 AM, Arnd Bergmann wrote:
>>> On Monday 23 September 2013, Kishon Vijay Abraham I wrote:
Btw if we hadn't programmed inbo
On Thursday 26 September 2013, Kishon Vijay Abraham I wrote:
> On Wednesday 25 September 2013 02:53 AM, Arnd Bergmann wrote:
> > On Monday 23 September 2013, Kishon Vijay Abraham I wrote:
> >> Btw if we hadn't programmed inbound translation table, the address will go
> >> untranslated (according to
On Wednesday 25 September 2013 02:53 AM, Arnd Bergmann wrote:
> On Monday 23 September 2013, Kishon Vijay Abraham I wrote:
>> Btw if we hadn't programmed inbound translation table, the address will go
>> untranslated (according to the data book). I guess that's how it was working
>> for Jingoo Han.
On Monday 23 September 2013, Kishon Vijay Abraham I wrote:
> Btw if we hadn't programmed inbound translation table, the address will go
> untranslated (according to the data book). I guess that's how it was working
> for Jingoo Han.
>
> **
> 3.10.4
> Inbound iATU Operation
>
> When there is no ma
On Mon, Sep 23, 2013 at 01:32:54PM +0800, Kishon Vijay Abraham I wrote:
> Hi Pratyush,
>
> On Monday 23 September 2013 09:44 AM, Pratyush Anand wrote:
> > Hi Kishon,
> >
> >
> > On Sun, Sep 22, 2013 at 07:16:34PM +0800, Kishon Vijay Abraham I wrote:
> >> Hi Arnd,
> >>
> >> Thanks for replying :-
Hi Pratyush,
On Monday 23 September 2013 09:44 AM, Pratyush Anand wrote:
> Hi Kishon,
>
>
> On Sun, Sep 22, 2013 at 07:16:34PM +0800, Kishon Vijay Abraham I wrote:
>> Hi Arnd,
>>
>> Thanks for replying :-)
>>
>> On Sunday 22 September 2013 03:33 AM, Arnd Bergmann wrote:
>>> On Saturday 21 Septem
Hi Kishon,
On Sun, Sep 22, 2013 at 07:16:34PM +0800, Kishon Vijay Abraham I wrote:
> Hi Arnd,
>
> Thanks for replying :-)
>
> On Sunday 22 September 2013 03:33 AM, Arnd Bergmann wrote:
> > On Saturday 21 September 2013, Kishon Vijay Abraham I wrote:
> >> {
> >> u32 val;
> >> voi
Hi Arnd,
Thanks for replying :-)
On Sunday 22 September 2013 03:33 AM, Arnd Bergmann wrote:
> On Saturday 21 September 2013, Kishon Vijay Abraham I wrote:
>> {
>> u32 val;
>> void __iomem *val1;
>> void __iomem *dbi_base = pp->dbi_base;
>>
>> /* Program viewport 0
On Saturday 21 September 2013, Kishon Vijay Abraham I wrote:
> {
> u32 val;
> void __iomem *val1;
> void __iomem *dbi_base = pp->dbi_base;
>
> /* Program viewport 0 : INBOUND : MEMORY*/
> val = PCIE_ATU_REGION_INBOUND | (0 & 0xF);
> dw_pcie_writel_rc
Hi,
On Thursday 12 September 2013 04:16 PM, Pratyush Anand wrote:
> On Thu, Sep 12, 2013 at 03:48:03PM +0530, Pratyush Anand wrote:
>> On Thu, Sep 12, 2013 at 06:07:23PM +0800, Kishon Vijay Abraham I wrote:
>>> Hi,
>>>
>>> On Thursday 12 September 2013 03:22 PM, Pratyush Anand wrote:
Hi Kisho
On Thursday 12 September 2013 04:16 PM, Pratyush Anand wrote:
> On Thu, Sep 12, 2013 at 03:48:03PM +0530, Pratyush Anand wrote:
>> On Thu, Sep 12, 2013 at 06:07:23PM +0800, Kishon Vijay Abraham I wrote:
>>> Hi,
>>>
>>> On Thursday 12 September 2013 03:22 PM, Pratyush Anand wrote:
Hi Kishon,
>>
On Thu, Sep 12, 2013 at 03:48:03PM +0530, Pratyush Anand wrote:
> On Thu, Sep 12, 2013 at 06:07:23PM +0800, Kishon Vijay Abraham I wrote:
> > Hi,
> >
> > On Thursday 12 September 2013 03:22 PM, Pratyush Anand wrote:
> > > Hi Kishon,
> > >
> > > On Thu, Sep 12, 2013 at 05:43:40PM +0800, Kishon Vij
On Thursday, September 12, 2013 6:44 PM, Kishon Vijay Abraham I wrote:
> On Thursday 12 September 2013 03:00 PM, Pratyush Anand wrote:
> >
> > From this conversation, It seems that you
> > have tested this driver and it works fine without inbound translation
> > function. I am sure that you would h
On Thu, Sep 12, 2013 at 06:07:23PM +0800, Kishon Vijay Abraham I wrote:
> Hi,
>
> On Thursday 12 September 2013 03:22 PM, Pratyush Anand wrote:
> > Hi Kishon,
> >
> > On Thu, Sep 12, 2013 at 05:43:40PM +0800, Kishon Vijay Abraham I wrote:
> >> Hi,
> >>
> >> On Thursday 12 September 2013 03:00 PM,
Hi,
On Thursday 12 September 2013 03:22 PM, Pratyush Anand wrote:
> Hi Kishon,
>
> On Thu, Sep 12, 2013 at 05:43:40PM +0800, Kishon Vijay Abraham I wrote:
>> Hi,
>>
>> On Thursday 12 September 2013 03:00 PM, Pratyush Anand wrote:
>>> Hi Jingoo,
>>>
>>>
>>> On Thu, Sep 12, 2013 at 03:15:04PM +0800
Hi Jingoo,
On Thu, Sep 12, 2013 at 03:15:04PM +0800, Jingoo Han wrote:
> On Tuesday 23 July 2013 12:30 PM, Kishon Vijay Abraham I wrote:
> > >> .
> > >> .
> > > + of_pci_range_to_resource(&range, np, &pp->cfg);
> > > + pp->config.cfg0_size =
> > >>
Hi Kishon,
On Thu, Sep 12, 2013 at 05:43:40PM +0800, Kishon Vijay Abraham I wrote:
> Hi,
>
> On Thursday 12 September 2013 03:00 PM, Pratyush Anand wrote:
> > Hi Jingoo,
> >
> >
> > On Thu, Sep 12, 2013 at 03:15:04PM +0800, Jingoo Han wrote:
> >> On Tuesday 23 July 2013 12:30 PM, Kishon Vijay A
Hi,
On Thursday 12 September 2013 03:00 PM, Pratyush Anand wrote:
> Hi Jingoo,
>
>
> On Thu, Sep 12, 2013 at 03:15:04PM +0800, Jingoo Han wrote:
>> On Tuesday 23 July 2013 12:30 PM, Kishon Vijay Abraham I wrote:
> .
> .
+ of_pci_range_to_resource(&range, np,
On Tuesday 23 July 2013 12:30 PM, Kishon Vijay Abraham I wrote:
> >> .
> >> .
> > + of_pci_range_to_resource(&range, np, &pp->cfg);
> > + pp->config.cfg0_size =
> > resource_size(&pp->cfg)/2;
> > + pp->config.cfg1_si
Hi Jingoo,
On Tuesday 23 July 2013 12:30 PM, Jingoo Han wrote:
> On Tuesday, July 23, 2013 3:30 PM, Kishon Vijay Abraham I wrote:
>> On Tuesday 23 July 2013 06:44 AM, Jingoo Han wrote:
>>> On Tuesday, July 23, 2013 12:04 AM, Kishon Vijay Abraham I wrote:
On Thursday 18 July 2013 10:51 AM, Jin
On Tuesday 23 July 2013, Jingoo Han wrote:
> >
> > Also I have one more query.
> > In your dt binding, your pci address and cpu address is the same. But the
> > pci
> > address should start at 0x and end at 0x (for 32bit).
> > Shouldn't
> > the cpu address map to something within
On Tuesday, July 23, 2013 3:30 PM, Kishon Vijay Abraham I wrote:
> On Tuesday 23 July 2013 06:44 AM, Jingoo Han wrote:
> > On Tuesday, July 23, 2013 12:04 AM, Kishon Vijay Abraham I wrote:
> >> On Thursday 18 July 2013 10:51 AM, Jingoo Han wrote:
> >>> Exynos PCIe IP consists of Synopsys specific p
On Tuesday, July 23, 2013 3:30 PM, Kishon Vijay Abraham I wrote:
> On Tuesday 23 July 2013 06:44 AM, Jingoo Han wrote:
> > On Tuesday, July 23, 2013 12:04 AM, Kishon Vijay Abraham I wrote:
> >> On Thursday 18 July 2013 10:51 AM, Jingoo Han wrote:
> >>> Exynos PCIe IP consists of Synopsys specific p
Hi,
On Tuesday 23 July 2013 06:44 AM, Jingoo Han wrote:
> On Tuesday, July 23, 2013 12:04 AM, Kishon Vijay Abraham I wrote:
>> On Thursday 18 July 2013 10:51 AM, Jingoo Han wrote:
>>> Exynos PCIe IP consists of Synopsys specific part and Exynos
>>> specific part. Only core block is a Synopsys desi
On 7/23/2013 6:44 AM, Jingoo Han wrote:
+ if (restype == IORESOURCE_MEM) {
> >+ of_pci_range_to_resource(&range, np, &pp->mem);
> >+ pp->mem.name = "MEM";
> >+ pp->config.mem_size = resource_size(&pp->mem);
> >+ pp-
On Tuesday, July 23, 2013 12:04 AM, Kishon Vijay Abraham I wrote:
> On Thursday 18 July 2013 10:51 AM, Jingoo Han wrote:
> > Exynos PCIe IP consists of Synopsys specific part and Exynos
> > specific part. Only core block is a Synopsys designware part;
> > other parts are Exynos specific.
> > Also,
Hi,
On Thursday 18 July 2013 10:51 AM, Jingoo Han wrote:
> Exynos PCIe IP consists of Synopsys specific part and Exynos
> specific part. Only core block is a Synopsys designware part;
> other parts are Exynos specific.
> Also, the Synopsys designware part can be shared with other
> platforms; thus
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